EPC1213LC20 Altera, EPC1213LC20 Datasheet - Page 56

• Manufacturer Part Number: EPC1213LC20
• Description: IC CONFIG DEVICE 212KBIT 20-PLCC
• Manufacturer: Altera
• Series: EPCr

Specifications of EPC1213LC20

• Programmable Type: OTP
• Memory Size: 212kb
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-PLCC
• For Use With: PLMJ1213 - PROGRAMMER ADAPTER 20 PIN J-LEAD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-2188-5

3–4
Figure 3–2. Altera FPGA Configuration in AS Mode (Serial Configuration Device Programmed Using Download Cable)
Notes to
(1) For the V
(2) Serial configuration devices cannot be cascaded.
(3) Connect the FPGA MSEL[] input pins to select the AS configuration mode. For details, refer to the respective FPGA family chapter in the
(4) For more information about configuration pin I/O requirements in an AS scheme for an Altera FPGA, refer to the respective FPGA family handbook
Configuration Handbook (Complete Two-Volume Set)
(Note 1)
Configuration
Configuration chapter.
Figure
,
(4)
CC
value, refer to the respective FPGA family handbook Configuration chapter.
f
3–2:
Handbook.
There are four signals on the serial configuration device that interface directly with
the FPGA’s control signals. The serial configuration device signals DATA, DCLK, ASDI,
and nCS interface with DATA0, DCLK, ASDO, and nCSO control signals on the FPGA,
respectively.
download cable, which configures an FPGA in AS mode.
configuration device programmed using the APU or a third-party programmer
configuring an FPGA in AS configuration mode.
For more information about the serial configuration device pin description, refer to
Table
3–23.
Configuration
Device (2)
Serial
Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
DATA
DCLK
ASDI
nCS
Figure 3–2
10 k
V
CC
(1)
10 k
shows a serial configuration device programmed via a
V
CC
Pin 1
(1) V
CC
10 k
10 k
(1)
V
CC
(1)
CONF_DONE
nSTATUS
nCONFIG
nCE
DATA0
DCLK
nCSO
ASDO
Altera FPGA
MSEL[]
nCEO
(3)
N.C.
© December 2009
Figure 3–3
Active Serial FPGA Configuration
shows a serial
Altera Corporation