EPC1213LC20 Altera, EPC1213LC20 Datasheet - Page 73

IC CONFIG DEVICE 212KBIT 20-PLCC

EPC1213LC20

Manufacturer Part Number
EPC1213LC20
Description
IC CONFIG DEVICE 212KBIT 20-PLCC
Manufacturer
Altera
Series
EPCr
Datasheet

Specifications of EPC1213LC20

Programmable Type
OTP
Memory Size
212kb
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Package / Case
20-PLCC
For Use With
PLMJ1213 - PROGRAMMER ADAPTER 20 PIN J-LEAD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2188-5

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Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Serial Configuration Device Memory Access
© December 2009
Altera Corporation
Fast Read Operation
The device is first selected by driving nCS low. The fast read instruction code is
followed by a 3-byte address (A23-A0) and a dummy byte, each bit being latched-in
during the rising edge of DCLK. Then the memory contents, at that address, is shifted
out on DATA, each bit being shifted out, at a maximum frequency of 40 MHz, during
the falling edge of DCLK.
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically
incremented to the next higher address after each byte of data is shifted out. The
whole memory can, therefore, be read with a single fast read instruction. When the
highest address is reached, the address counter rolls over to 000000h, allowing the
read sequence to be continued indefinitely.
The fast read instruction is terminated by driving nCS high at any time during data
output. Any fast read instruction is rejected during the Erase, Program, or Write
operations without any effect on the operation that is in progress .
Figure 3–12. FAST_READ Operation Timing Diagram
Note to
(1) Address bit A[23] is a don't-care bit in EPCS64. Address bits A[23..21] are don't-care bits in EPCS16. Address
bits A[23..19] are don't-care bits in EPCS4. Address bits A[23..17] are don't-care bits in the EPCS1.
DCLK
DCLK
ASDI
DATA
ASDI
DATA
nCS
nCS
Figure
7
32
3–12:
6
33
5
34
0
Dummy Byte
4
35
1
3
36
2
High Impedance
Operation Code
2
37
3
1
38
4
0
39
5
MSB
7
40
6
6
41
7
Figure
MSB
5
23
42
8
DATA Out 1
4
22
43
9
3
21
44
3–12.
10
24-Bit Address (1)
2
45
Configuration Handbook (Complete Two-Volume Set)
1
46
0
47
3
MSB
28
7
2
29
6
1
30
5
0
DATA Out 2
31
4
3
2
1
0
MSB
7
3–21

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