PCA9514AD,112 NXP Semiconductors, PCA9514AD,112 Datasheet - Page 5

• Manufacturer Part Number: PCA9514AD,112
• Description: IC I2C/SMBUS BUFF 8-SOIC
• Manufacturer: NXP Semiconductors
• Type: I²C-Bus and SMBus Switchr

Specifications of PCA9514AD,112

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Applications: Hot-Swap/SMB Buffer
• Internal Switch(s): Yes
• Current Limit: 50mA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: PCA
• Supply Voltage (max): 7 V
• Supply Voltage (min): - 0.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Output Voltage: 0.3 V
• Propagation Delay Time: 80 ns
• Supply Current: 3.5 mA
• Logic Type: SMBus Bus Buffer
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: SO
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3365-5; 935279867112; PCA9514AD

NXP Semiconductors
7. Pinning information
8. Functional description
PCA9513A_PCA9514A_4
Product data sheet
7.1 Pinning
7.2 Pin description
8.1 Start-up
Table 3.
Refer to
PCA9514A”.
An undervoltage and initialization circuit holds the parts in a disconnected state which
presents high-impedance to all SDAn and SCLn pins during power-up. A LOW on the
ENABLE pin also forces the parts into the low current disconnected state when the I
essentially zero. As the power supply is brought up and the ENABLE is HIGH or the part is
powered and the ENABLE is taken from LOW to HIGH it enters an initialization state
where the internal references are stabilized and the 92 A input pull-ups (on the
PCA9513A) is enabled. At the end of the initialization state the ‘Stop Bit And Bus Idle’
detect circuit is enabled. With the ENABLE pin HIGH long enough to complete the
initialization state (t
Symbol
ENABLE
SCLOUT
SCLIN
GND
READY
SDAIN
SDAOUT
V
Fig 3.
CC
SCLOUT
ENABLE
SCLIN
Figure 1 “Block diagram of PCA9513A”
GND
Pin configuration for SO8
Pin description
Pin
1
2
3
4
5
6
7
8
1
2
3
4
PCA9513AD
PCA9514AD
en
Description
Chip enable. Grounding this input puts the part in a Low current (< 1 A)
mode. It also disables the rise time accelerators, isolates SDAIN from
SDAOUT and isolates SCLIN from SCLOUT.
serial clock output to and from the SCL bus on the card
serial clock input to and from the SCL bus on the backplane
Ground. Connect this pin to a ground plane for best results.
open-drain output which pulls LOW when SDAIN and SCLIN are
disconnected from SDAOUT and SCLOUT, and goes HIGH when the two
sides are connected
serial data input to and from the SDA bus on the backplane
serial data output to and from the SDA bus on the card
power supply
) and remaining HIGH when all the SDAn and SCLn pins have been
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Rev. 04 — 18 August 2009
8
7
6
5
V
SDAOUT
SDAIN
READY
CC
Hot swappable I
PCA9513A; PCA9514A
Fig 4.
and
SCLOUT
ENABLE
SCLIN
GND
Figure 2 “Block diagram of
Pin configuration for TSSOP8
(MSOP8)
2
1
2
3
4
C-bus and SMBus bus buffer
PCA9513ADP
PCA9514ADP
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© NXP B.V. 2009. All rights reserved.
8
7
6
5
V
SDAOUT
SDAIN
READY
CC
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CC
is