PCA9633D16,112 NXP Semiconductors, PCA9633D16,112 Datasheet
PCA9633D16,112
Specifications of PCA9633D16,112
935281309112
PCA9633D16
Related parts for PCA9633D16,112
PCA9633D16,112 Summary of contents
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PCA9633 4-bit Fm+ I Rev. 05 — 25 July 2008 1. General description The PCA9633 Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own 8-bit resolution (256 steps) fixed frequency Individual PWM controller that operates ...
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... NXP Semiconductors 2. Features I 4 LED drivers. Each output programmable at: N Off Programmable LED brightness N Programmable group dimming/blinking mixed with individual LED brightness I 1 MHz Fast-mode Plus I output for driving high capacitive buses I 256-step (8-bit) linear programmable brightness per LED output varying from fully off ...
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... NXP Semiconductors I Packages offered: SO, TSSOP (MSOP), HVQFN, HVSON 3. Applications I RGB or RGBA LED drivers I LED status information I LED displays I LCD backlights I Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside mark PCA9633D16 PCA9633 PCA9633DP1 9633 PCA9633DP2 ...
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... NXP Semiconductors 5. Block diagram PCA9633 SCL INPUT FILTER SDA POWER- RESET V SS REGISTER X BRIGHTNESS CONTROL 24.3 kHz 97 kHz 25 MHz OSCILLATOR OE (16-pin version only) Fig 1. Block diagram of PCA9633 PCA9633_5 Product data sheet 16-pin version 10-pin version C-BUS CONTROL PWM GRPFREQ REGISTER 190 Hz Rev. 05 — ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig LED0 LED1 LED2 LED3 A2 A3 Fig 4. terminal 1 index area LED0 LED1 LED2 LED3 Fig 6. PCA9633_5 Product data sheet 1 8 LED0 V DD LED1 2 7 SDA PCA9633DP1 3 6 LED2 SCL 4 5 LED3 V SS 002aab314 Pin configuration for TSSOP8 ...
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... NXP Semiconductors 6.2 Pin description Table 2. Symbol LED0 LED1 LED2 LED3 V SS SCL SDA V DD Table 3. Symbol LED0 LED1 LED2 LED3 SCL SDA V DD PCA9633_5 Product data sheet Pin description for TSSOP8 and HVSON8 Pin Type Description 1 O LED driver LED driver 1 ...
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... NXP Semiconductors Table 4. Symbol A0 A1 LED0 LED1 LED2 LED3 SCL SDA Table 5. Symbol LED0 LED1 LED2 LED3 SCL SDA [1] HVQFN16 package die supply ground is connected to both the and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...
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... NXP Semiconductors 7. Functional description Refer to 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware address pins. Two of these addresses, Software Reset and LED All Call, cannot be used because their default power-up state is ON, leaving a maximum of 126 addresses ...
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... NXP Semiconductors 7.1.2 LED All Call I • Default power-up value (ALLCALLADR register): E0h or 1110 000X • Programmable through I • At power-up, LED All Call I E0h (R E1h (R sent by the master. See Section 7.3.8 “LED All Call I Remark: The default LED All Call regular I PCA9633s on the I 7 ...
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... NXP Semiconductors 7.2 Control register Following the successful acknowledgement of the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCA9633, which will be stored in the Control register. The lowest 4 bits are used as a pointer to determine which register will be accessed (D[3:0]). The highest 3 bits are used as Auto-Increment fl ...
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... NXP Semiconductors AI[2:0] = 110 is used when the LED drivers must be globally programmed with different settings during the same I blinking change. AI[2:0] = 111 is used when individual and global changes must be performed during the 2 same I same time. Only the 4 least significant bits D[3:0] are affected by the AI[2:0] bits. ...
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... NXP Semiconductors 7.3.1 Mode register 1, MODE1 Table 8. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access 7 AI2 read only 6 AI1 read only 5 AI0 read only 4 SLEEP R/W 3 SUB1 R/W 2 SUB2 R/W 1 SUB3 R/W 0 ALLCALL R/W [1] It takes 500 s max. for the oscillator and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 s window ...
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... NXP Semiconductors Table 9. MODE2 - Mode register 2 (address 01h) bit description Legend: * default value. Bit Symbol Access OUTNE[1:0] R/W [3][4] [1] See Section 7.7 “Using the PCA9633 with and without external drivers” mode. Some newer LEDs include integrated Zener diodes to limit voltage transients, reduce EMI and protect the LEDs, and these must be driven only in the open-drain mode to prevent overheating the IC ...
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... NXP Semiconductors When DMBLNK bit is programmed with 1, GRPPWM and GRPFREQ registers define a global blinking pattern, where GRPFREQ contains the blinking period (from 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %). duty cycle 7.3.5 Group frequency, GRPFREQ Table 12. Legend: * default value. Address ...
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... NXP Semiconductors 2 7.3.7 I C-bus subaddress SUBADRx Table 14. Legend: * default value. Address 09h 0Ah 0Bh Subaddresses are programmable through the I E4h, E8h, and the device(s) will not acknowledge these addresses right after power-up (the corresponding SUBx bit in MODE1 register is equal to 0). Once subaddresses have been programmed to their right values, SUBx bits need to be set order to have the device acknowledging these addresses (MODE1 register) ...
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... NXP Semiconductors 7.4 Active LOW output enable input The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at the same time. This control signal is only available for the 16-pin version and does not apply to the 8-pin or 10-pin versions. ...
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... NXP Semiconductors 7.6 Software Reset The Software Reset Call (SWRST Call) allows all the devices in the I the power-up state value through a specific formatted I correctly, it implies that the I bus. The SWRST Call function is defined as the following START command is sent by the I 2 ...
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... NXP Semiconductors 7.7 Using the PCA9633 with and without external drivers The PCA9633 LED output drivers are 5.5 V only tolerant and can sink the device needs to drive LEDs to a higher voltage and/or higher current, use of an external driver is required. • INVRT bit (MODE2 register) can be used to keep the LED PWM control firmware the ...
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... NXP Semiconductors Table 18. Output transistors based on LEDOUT registers, INVRT and OUTDRV bits when LEDOUT INVRT OUTDRV Upper transistor LED driver off LED driver Individual brightness 0 1 control Individual + Group dimming/blinking [1] OE applies to 16-pin version only. When LED output state is controlled only by OUTNE[1:0] bits (MODE2 register). ...
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... NXP Semiconductors 7.8 Individual brightness control with group dimming/blinking A 97 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is used to control individually the brightness for each LED. On top of this signal, one of the following signals can be superimposed (this signal can be applied to the 4 LED outputs): • ...
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... NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 14. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...
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... NXP Semiconductors 9. Bus transactions slave address START condition (1) 16-pin version only. (2) See Table 7 for register definition. Fig 16. Write to a specific register (1) slave address START condition R/W acknowledge from slave SUBADR3 register (cont.) A acknowledge from slave (1) 16-pin version only. Fig 17. Write to all registers using the Auto-Increment feature ...
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... NXP Semiconductors (1) slave address START condition R/W acknowledge from slave PWM2 register (cont.) A acknowledge from slave (1) 16-pin version only. Fig 18. Multiple writes to Individual Brightness registers only using the Auto-Increment feature (1) slave address START condition R/W acknowledge from slave data from MODE2 register (cont ...
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... NXP Semiconductors slave address sequence ( START condition LED All Call I sequence ( START condition (1) 10-pin version is used for this figure. Four PCA9633DP2s are used and the same sequence (A) (above) is sent to each of them. A[1: 11. (2) ALLCALL bit in MODE1 register is equal to 1 for this example. ...
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... NXP Semiconductors 10. Application design-in information V = 2 C-BUS/SMBus MASTER SDA SCL C-bus address = 0010 101X. All of the 4 LEDn outputs configurable as either open-drain or totem pole. Mixing of configurations is not possible. (1) OE requires pull-up resistor if control signal from the master is open-drain. Fig 22. Typical application Question 1: What kind of edge rate control is there on the outputs? • ...
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... NXP Semiconductors Question 3: Can I really sink 400 mA through the single ground pin on the package and will this cause any ground bounce problem due to the PWM of the LEDs? • Yes, you can sink 400 mA through a single ground pin on the package. Although the package only has one ground pin, there are two ground pads on the die itself connected to this one pin ...
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... NXP Semiconductors 12. Static characteristics Table 20. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current leakage current ...
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... NXP Semiconductors Table 20. Static characteristics Symbol Parameter Address inputs V LOW-level input voltage IL V HIGH-level input voltage IH I input leakage current LI C input capacitance i [1] V must be lowered to 0 order to reset part. DD [2] Each bit must be limited to a maximum and the total package limited to 100 mA due to internal busing limits. ...
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... NXP Semiconductors [5] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V bridge the undefined region of SCL’s falling edge. [6] The maximum t for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (t f 250 ns ...
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... NXP Semiconductors 14. Test information Fig 25. Test circuitry for switching times PCA9633_5 Product data sheet V I PULSE GENERATOR R = Load resistor for LEDn. R for SDA and SCL > less current Load capacitance includes jig and probe capacitance Termination resistance should be equal to the output impedance Z T Rev. 05 — ...
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... NXP Semiconductors 15. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors TSSOP10: plastic thin shrink small outline package; 10 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0 0.2 0.00 0.2 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 16. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 17. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...
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... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 17.4 Reflow soldering Key characteristics in reflow soldering are: • ...
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... NXP Semiconductors Fig 32. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 18. Abbreviations Table 24. Acronym CDM DUT EMI ESD HBM 2 I C-bus LCD LED LSB MM MSB ...
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... NXP Semiconductors 19. Revision history Table 25. Revision history Document ID Release date PCA9633_5 20080725 • Modifications: Section 2 th – 9 – deleted (old) 12 • Section 7.1.1 “Regular I items • Figure 21 “Software Reset (SWRST) Call – changed “Byte 1 = 0xA5” to “Byte 1 = A5h” – changed “Byte 2 = 0x5A” to “Byte 2 = 5Ah” ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . . 8 7.1 Device addresses . . . . . . . . . . . . . . . . . . . . . . . 8 2 7.1.1 Regular I C-bus slave address . . . . . . . . . . . . . 8 2 7.1.2 LED All Call I C-bus address . . . . . . . . . . . . . . ...