VND5050J-E STMicroelectronics, VND5050J-E Datasheet
VND5050J-E
Specifications of VND5050J-E
Available stocks
Related parts for VND5050J-E
VND5050J-E Summary of contents
Page 1
... Electrostatic discharge protection Applications ■ All types of resistive, inductive and capacitive loads Description The VND5050K-E and VND5050J-E are monolithic devices made using STMicroelectronics VIPower M0-5 technology. they are intended for driving resistive or inductive loads with one side connected to ground. Active V ...
Page 2
... PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.3 PowerSSO-24™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.4 PowerSSO-12™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.5 PowerSSO-24™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2/37 Solution 1: resistor in the ground line (RGND only Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21 ® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E ...
Page 3
... VND5050J-E / VND5050K-E List of tables Table 2. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Thermal data Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 7. Switching (VCC = 13V 25° Table 8. Status pin (V =0V Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10. Openload detection Table 11. ...
Page 4
... PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 41. PowerSSO-12™ tube shipment (no suffix Figure 42. PowerSSO-12™ tape and reel shipment (suffix “TR” Figure 43. PowerSS0-24™ tube shipment (no suffix Figure 44. PowerSSO-24™ tape and reel shipment (suffix “TR” 4/ case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 CC Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E ...
Page 5
... VND5050J-E / VND5050K-E 1 Block diagram and pin description Figure 1. Block diagram V CC GND CLAMP INPUT1 STATUS1 STAT_DIS OVERTEMP. 1 INPUT2 STATUS2 Table 2. Pin function Name V Battery connection. CC OUTPUTn Power output. Ground connection. Must be reverse battery protected by an external diode/resistor GND network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output INPUTn switch state ...
Page 6
... OUTPUT 1 3 STATUS1 9 4 OUTPUT OUTPUT 2 STATUS2 PowerSSO-12 STATUS N.C. OUTPUT X X (1) N.R. X Doc ID 12266 Rev 6 VND5050J-E / VND5050K GND. N.C. INPUT1 N.C. N.C. INPUT2 N. PowerSSO-24 INPUT X X Through 10KΩ Through 10KΩ N.R. resistor OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 ...
Page 7
... VND5050J-E / VND5050K-E 2 Electrical specifications Figure 3. Current and voltage conventions INn Note OUTn CCn 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied ...
Page 8
... OUT j I =2A; V OUT CC I =20mA S Off-state OUT SENSE On-state =0A OUT Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E Value 4000 4000 4000 5000 5000 750 -40 to 150 - 55 to 150 Value PowerSSO-12 PowerSSO-24 2.8 2.8 See Figure 32 See Figure 36 Min. Typ. Max. Unit 4 ...
Page 9
... VND5050J-E / VND5050K-E Table 6. Power section Symbol Off-state output I L(off1) current Off-state output I L(off2) current Output - voltage 1. PowerMOS leakage included. 2. For each channel. Table 7. Switching (V Symbol t Turn-on delay time d(on) t Turn-off delay time d(off) dV /dt Turn-on voltage slope OUT (on) dV /dt Turn-off voltage slope ...
Page 10
... Figure Parameter Test conditions V = 5V,8V< 0A, V OUT CC (see Figure (see OUT V = 0V, 8V<V IN (see Figure 4) Parameter Test conditions V =0 Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E Min. Typ 150 175 135 7 Figure 4) =0; L=6mH V - Min. Typ. See <18V ...
Page 11
... VND5050J-E / VND5050K-E Table 11. Logic input (continued) Symbol V Input high level IH I High level input current IH V Input hysteresis voltage I(hyst) V Input clamp voltage ICL STAT_DIS low level V SDL voltage Low level STAT_DIS I SDL current STAT_DIS high level V SDH voltage High level STAT_DIS ...
Page 12
... The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge. 3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge. Figure 5. Switching characteristics V 12/37 Input OUT 80% dV /dt OUT (on) 10 INPUT t d(on) Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E Output Sense (V =0V) CSD ( ( 90% dV ...
Page 13
... VND5050J-E / VND5050K-E Figure 6. Output voltage drop limitation Table 13. Electrical transient requirements (part 1/3) ISO 7637-2: 2004(E) test pulse (2) 5b Table 14. Electrical transient requirements (part 2/3) ISO 7637-2: 2004(E) test pulse ( The above test levels must be considered referred Valid in case of external load dump clamp: 40V maximum referred to ground. ...
Page 14
... Electrical transient requirements (part 3/3) Class C All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to E disturbance and cannot be returned to proper operation without replacing the device. 14/37 Contents Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E ...
Page 15
... VND5050J-E / VND5050K-E Figure 7. Waveforms INPUT STAT_DIS LOAD CURRENT STATUS V CC INPUT STAT_DIS LOAD CURRENT STATUS INPUT STAT_DIS LOAD VOLTAGE STATUS INPUT STAT_DIS LOAD VOLTAGE LOAD CURRENT STATUS INPUT STAT_DIS LOAD VOLTAGE STATUS T j INPUT STAT_DIS LOAD CURRENT STATUS NORMAL OPERATION UNDERVOLTAGE ...
Page 16
... Figure 13. Input hysteresis voltage Vihyst (V) 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 100 125 150 175 -50 Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E High level input current Vin=2.1V - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) - 100 ...
Page 17
... VND5050J-E / VND5050K-E Figure 14. Status low output voltage Vstat (V) 0.9 0.8 Istat=1.6mA 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 - (°C) Figure 16. Status leakage current Ilstat (uA) 0.055 0.05 Vstat=5V 0.045 0.04 0.035 0.03 0.025 -50 - (°C) Figure 18. Status clamp voltage Vscl (V) 9 8.5 ...
Page 18
... Figure 23. Undervoltage shutdown Vusd ( 100 125 150 175 -50 Figure 25. STAT_DIS clamp voltage Vsdcl( 100 125 150 175 -50 Doc ID 12266 Rev 6 VND5050J-E / VND5050K LIM case Vcc=13V - 100 125 150 Tc (°C) - 100 125 150 Tc (°C) Isd=1mA - 100 125 150 Tc (°C) 175 ...
Page 19
... VND5050J-E / VND5050K-E Figure 26. High level STAT_DIS voltage Vsdh( -50 - (°C) Figure 27. Low level STAT_DIS voltage Vsdl( 100 125 150 175 -50 Doc ID 12266 Rev 6 Electrical specifications - 100 125 150 Tc (°C) 175 19/37 ...
Page 20
... STATUS R prot V GND ). S(on)max ) / (-I ) GND (when V <0: during reverse battery situations) is: GND the input thresholds and the status output S(on)max GND . GND Doc ID 12266 Rev 6 VND5050J-E / VND5050K OUTPUT GND R GND D GND only) GND resistor. GND becomes the sum of the S(on)max D ld ...
Page 21
... VND5050J-E / VND5050K-E If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: a diode (D A resistor (R =1kΩ) should be inserted in parallel to D GND inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (≈ ...
Page 22
... OFF when the module standby. The values of V OLmin section. Figure 29. Open-load detection in off-state 22/37 out , V and I are available in the Electrical Characteristics OLmax L(off2) V batt DRIVER INPUT + LOGIC + R - STATUS V OL GROUND Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E is pulled high (up to several mA), the pull L(off2) OUT R L ...
Page 23
... VND5050J-E / VND5050K-E 3.5 Maximum demagnetization energy (V Figure 30. Maximum turn-off current versus inductance (for each channel) 100 0 150°C single pulse jstart 100°C repetitive pulse jstart 125°C repetitive pulse jstart Note: Values are generated with R demagnetization) of every pulse must not exceed the temperature specified above for curves A and B ...
Page 24
... Copper areas: from minimum pad lay-out to 8cm Figure 32. R thj-amb on) RTHj _amb( ° 24/37 and Z measurements (PCB: Double layer, Thermal Vias, FR4 PCB copper area in open box free air condition (one channel 2 4 PCB Cu heat sink area ( cm^ 2) Doc ID 12266 Rev 6 VND5050J-E / VND5050K ...
Page 25
... VND5050J-E / VND5050K-E Figure 33. PowerSSO-12™ thermal impedance junction ambient single pulse (one channel on) ZTH ( °C/ W) 100 10 1 0,1 0,0001 0,001 Equation 1: pulse calculation formula ⋅ δ THδ TH where δ Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-12™ a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered ...
Page 26
... PowerSSO-12™ thermal parameters Area/island (cm R1= R7 (°C/W) R2= R8 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1= C7 (W.s/°C) C2= C8 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 26/ Footprint 0.7 2 0.001 0.0025 0.05 0.2 0.27 3 Doc ID 12266 Rev 6 VND5050J-E / VND5050K 0.1 0.1 0 ...
Page 27
... VND5050J-E / VND5050K-E 4.2 PowerSSO-24™ thermal data Figure 35. PowerSSO-24™ PC board Note: Layout condition of R area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side), Copper areas: from minimum pad lay-out to 8cm Figure 36. R thj-amb on) RTHj_amb(°C/ and Z measurements (PCB: Double layer, Thermal Vias, FR4 ...
Page 28
... Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-24™ b. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 28/ δ – THtp Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E (b) ...
Page 29
... VND5050J-E / VND5050K-E Table 17. PowerSSO-24™ thermal parameters Area/island (cm R1=R7 (°C/W) R2=R8 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1=C7 (W.s/°C) C2=C8 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/° Footprint 0 7 0.001 0.0022 0.025 0.75 1 2.2 Doc ID 12266 Rev 6 Package and PCB thermal data ...
Page 30
... In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. 5.2 PowerSSO-12™ package information Figure 39. PowerSSO-12™ package dimensions 30/37 packages Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E ® ...
Page 31
... VND5050J-E / VND5050K-E Table 18. PowerSSO-12™ mechanical data Symbol ddd Package and packing information Millimeters Min. Typ. 1.25 0 1.10 0.23 0.19 4.8 3.8 0.8 5.8 0.25 0.4 0° 1.9 3.6 Doc ID 12266 Rev 6 Max. 1.62 0.1 1.65 0.41 0.25 5.0 4.0 6.2 ...
Page 32
... PowerSSO-24™ package information Figure 40. PowerSSO-24™ package dimensions Table 19. PowerSSO-24™ mechanical data Symbol 32/37 Millimeters Min. Typ. 2.15 0 0.33 0.23 10.10 7.4 0.8 8.8 2.3 10.1 Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E Max. 2.45 2.35 0.1 0.51 0.32 10.50 7.6 0.1 10.5 ...
Page 33
... VND5050J-E / VND5050K-E Table 19. PowerSSO-24™ mechanical data (continued) Symbol Package and packing information Millimeters Min. Typ. 0deg 0.55 1.2 0.8 2.9 3.65 1.0 4.1 6.5 Doc ID 12266 Rev 6 Max. 0.4 8deg 0.85 10deg 4.7 7.1 33/37 ...
Page 34
... D (± 0.05) 1.5 D1 (min) 1.5 F (± 0.1) 5.5 K (max) 4.5 P1 (± 0.1) 2 End Top cover 500mm min tape Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E 100 2000 532 1.85 6.75 0.6 REEL DIMENSIONS Base Q.ty 2500 Bulk Q.ty 2500 A (max) 330 B (min) 1.5 C (± ...
Page 35
... VND5050J-E / VND5050K-E 5.5 PowerSSO-24™ packing information Figure 43. PowerSS0-24™ tube shipment (no suffix Figure 44. PowerSSO-24™ tape and reel shipment (suffix “TR”) TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing ...
Page 36
... Added F and k rows Updated Figure 40: PowerSSO-24™ package Updated Table 19: PowerSSO-24™ mechanical 6 – Deleted G1 row – Added and U rows. Doc ID 12266 Rev 6 VND5050J-E / VND5050K-E Changes ratings: E entries updated. MAX 1/3):Test level changed from 19 to 18A. LIMH data: on). ...
Page 37
... VND5050J-E / VND5050K-E Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...