VND5050J-E STMicroelectronics, VND5050J-E Datasheet - Page 21

• Manufacturer Part Number: VND5050J-E
• Description: IC DRVR HISIDE 2CH POWERSSO12
• Manufacturer: STMicroelectronics
• Type: High Sider

Specifications of VND5050J-E

• Input Type: Non-Inverting
• Number Of Outputs: 2
• On-state Resistance: 50 mOhm
• Current - Peak Output: 18A
• Voltage - Supply: 4.5 V ~ 36 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: PowerSSO-12
• Supply Voltage (min): 4.5 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Maximum Turn-off Delay Time: 40000 ns
• Maximum Turn-on Delay Time: 20000 ns
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

VND5050J-E / VND5050K-E
3.1.2
3.2
3.3
3.4
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
Solution 2: a diode (D
A resistor (R
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
Load dump protection
D
V
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
Microcontroller I/Os protection
If a ground protection network is used and negative transient are present on the V
the control pins will be pulled negative. ST suggests to insert a resistor (R
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of μC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of μC
I/Os.
-V
Calculation example:
For V
5kΩ ≤ R
Recommended values: R
Open-load detection in off-state
Off-state open load detection requires an external pull-up resistor (R
OUTPUT pin and a positive supply voltage (V
microprocessor.
The external resistor has to be selected according to the following requirements:
1.
2.
CC
ld
CCpeak
is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
max DC rating. The same applies if the device is subject to transients on the V
no false open load indication when load is connected: in this case we have to avoid
V
V
no misdetection when load is disconnected: in this case the V
V
CCpeak
OUT
OUT
OLmax
prot
/I
latchup
=(V
to be higher than V
= - 100V and I
≤ 180kΩ
; this results in the following condition R
GND
PU
/(R
=1kΩ) should be inserted in parallel to D
≤ R
L
prot
+R
PU
≤ (V
prot
))R
latchup
OHμC
GND
L
=10kΩ.
Olmin
<V
Doc ID 12266 Rev 6
Olmin
) in the ground line
-V
≥ 20mA; V
; this results in the following condition
IH
-V
.
GND
) / I
OHμC
PU
IHmax
) like the +5V line used to supply the
≥ 4.5V
PU
<(V
GND
PU
–V
if the device drives an
OLmax
OUT
Application information
PU
)/I
has to be higher than
) connected between
L(off2)
prot
.
) in line to
CC
CC
line,
line
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