MAX16065ETM+ Maxim Integrated Products, MAX16065ETM+ Datasheet - Page 14

• Manufacturer Part Number: MAX16065ETM+
• Description: IC SYSTEM MANAGER 12CH 48-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX16065ETM+

• Applications: Power Supply Monitor, Sequencer
• Voltage - Supply: 2.8 V ~ 14 V
• Current - Supply: 4.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Number Of Voltages Monitored: 12
• Undervoltage Threshold: 2.7 V
• Manual Reset: Resettable
• Watchdog: Yes
• Battery Backup Switching: No
• Power-up Reset Delay (typ): 200 us
• Supply Voltage (max): 14 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 10 mA
• Maximum Power Dissipation: 2222 mW
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Chip Enable Signals: No
• Internal Hysteresis: Yes
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
Table
sequence delay is then counted before moving to the
next slot.
Slot 0 does not monitor any MON_ input and does not
control any EN_OUT_. Slot 0 waits for the Software
Enable bit r73h[0] to be a logic-high and for the voltage
on EN to rise above 1.4V before initiating the power-up
sequence and counting its own sequence delay.
Any MON_ input that suffers a fault that occurs during
power-up sequencing causes all the EN_OUT_s to turn
off and the sequencer to shut down regardless of the
state of the critical fault enables (see the Faults section
for more information). If a MON_ input is less critical to
system operation, it can be configured as “monitoring
only” (see Table 6) for either the primary or secondary
sequence. Monitoring for MON_ inputs assigned as
“monitoring only” begins after sequencing is complete
for that group, and can trigger a critical fault only if
specifically configured to do so using the critical fault
enables.
On power-up, when EN is high and the Software Enable
bit is 1, the MAX16065/MAX16066 begin sequencing
with Slot 0. After the sequencing delay for Slot 0 expires,
the sequencer advances to Slot 1, and all EN_OUT_s
assigned to the slot assert. All MON_ inputs assigned to
Slot 1 are monitored and when the voltage rises above the
UV fault threshold, the sequence delay counter is started.
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4. Power-Up/Power-Down Slot Delays
CODE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Power-Up
When the t
assigned to the slot are above the fault UV threshold,
a fault asserts. EN_OUT_ outputs are disabled and the
MAX16065/MAX16066 return to the power-off state.
When the sequence delay expires, the MAX16065/
MAX16066 proceed to the next slot.
After the voltages on all MON_ inputs assigned to the
last slot exceed the UV fault threshold and the slot delay
expires, the MAX16065/MAX16066 start the reset time-
out counter. After the reset timeout, RESET deasserts.
r75h[4:1] sets the t
Power-down starts when EN is pulled low or the Software
Enable bit is set to ‘0.’ Power down EN_OUT_s simul-
taneously or in reverse-sequence mode by setting the
Reverse Sequence bit (r75h[0]) appropriately.
When the MAX16065/MAX16066 are fully powered up
(including secondary sequence group, if enabled) and
EN or the Software Enable bit is set to ‘0’, the EN_OUT_s
assigned to Slot 12 deassert, the MAX16065/MAX16066
wait for the Slot 12 sequence delay and then proceed to
the previous slot (Slot 11), and so on until the EN_OUT_s
assigned to Slot 1 turn off. When simultaneous power-
down is selected (r75h[0] set to ‘0’), all EN_OUT_s turn
off at the same time.
FAULT
counter expires before all MON_ inputs
FAULT
VALUE
100ms
200ms
400ms
800ms
500Fs
10ms
12ms
25ms
25Fs
1ms
2ms
3ms
4ms
6ms
8ms
1.6s
delay. See Table 7 for details.
Reverse-Sequence Mode
Power-Down