AD637JQ Analog Devices Inc, AD637JQ Datasheet - Page 9

IC RMS/DC CONV PRECISION 14-CDIP

AD637JQ

Manufacturer Part Number
AD637JQ
Description
IC RMS/DC CONV PRECISION 14-CDIP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD637JQ

Rohs Status
RoHS non-compliant
Current - Supply
2.2mA
Voltage - Supply
±3.0V ~ 18V
Mounting Type
Through Hole
Package / Case
14-CDIP (0.300", 7.62mm)
Accuracy %
0.25%
Bandwidth
200kHz
Supply Current
2.2mA
Power Dissipation Pd
108mW
Supply Voltage Range
± 3V To ± 18V
Digital Ic Case Style
DIP
No. Of Pins
14
Input Type
RMS
Module Type
Converter
Output Type
DC
Voltage, Supply
± 18 VDC
For Use With
AD637-EVALZ - BOARD EVALUATION FOR AD637
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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50kΩ
CHOOSING THE AVERAGING TIME CONSTANT
The AD637 computes the true rms value of both dc and ac
input signals. At dc, the output tracks the absolute value of the
input exactly; with ac signals, the AD637 output approaches the
true rms value of the input. The deviation from the ideal rms
value is due to an averaging error. The averaging error
comprises an ac component and a dc component. Both
components are functions of input signal frequency f and the
averaging time constant τ (τ: 25 ms/μF of averaging capacitance).
Figure 9 shows that the averaging error is defined as the peak
value of the ac component (ripple) and the value of the dc error.
The peak value of the ac ripple component of the averaging
error is defined approximately by the relationship
+V
–V
R1
OUTPUT
OFFSET
S
S
TRIM
–2.5
–5.0
6.3
+V
5.0
2.5
S
0
50
1MΩ
0
R2
τ
4.7kΩ
f
Figure 8. Optional External Gain and Offset Trims
AD637K: 0.5mV ± 0.2%
Input Level AD637K Internal and External Trims
in
%
1
2 NC
3 COMMON
4
5
6
7
BUFF IN
OUTPUT
OFFSET
CS
DEN
INPUT
dB OUTPUT
Figure 7. Maximum Total Error vs.
of
0.25mV ± 0.05%
EXTERNAL
0.5
reading
25kΩ
BIAS
INPUT LEVEL (V)
AD637K MAX
SCALE FACTOR TRIM
where
1.0
SQUARER/
AD637
DIVIDER
1kΩ
R3
EXTERNAL TRIM
(
τ
ABSOLUTE
AD637K
VALUE
>
INTERNAL TRIM
25kΩ
1
1.5
f
BUFF
)
OUT
+V
–V
C
V
NC
AV
IN
S
S
14
NC
13
12
11
10
9
8
+
C
147Ω
AV
R4
+V
–V
2.0
V
OUT
S
S
V
IN
= V
Rev. K | Page 9 of 20
IN
2
This ripple can add a significant amount of uncertainty to the
accuracy of the measurement being made. The uncertainty can
be significantly reduced through the use of a postfiltering
network or by increasing the value of the averaging capacitor.
The dc error appears as a frequency dependent offset at the
output of the AD637 and follows the relationship
Because the averaging time constant, set by C
the time that the rms converter holds the input signal during
computation, the magnitude of the dc error is determined only
by C
The ac ripple component of averaging error is greatly reduced
by increasing the value of the averaging capacitor. There are two
major disadvantages to this: the value of the averaging capacitor
becomes extremely large and the settling time of the AD637
increases in direct proportion to the value of the averaging
capacitor (T
method of reducing the ripple is by using the postfilter network,
as shown in Figure 11. This network can be used in either a 1-
pole or 2-pole configuration. For most applications, the 1-pole
filter gives the best overall compromise between ripple and
settling time.
Frequency Using the AD637 in the Standard RMS Connection with a 1 × μF C
Figure 10. Comparison of Percent DC Error to the Percent Peak Ripple over
E
AV
O
. 0
100
DOUBLE-FREQUENCY
1.0
0.1
and is not affected by postfiltering.
10
16
Figure 9. Typical Output Waveform for a Sinusoidal Input
10
+
S
6
RIPPLE
1
= 115 ms/μF of averaging capacitance). A preferable
4 .
DC ERROR
τ
2
f
SINE WAVE INPUT FREQUENCY (Hz)
2
in
IDEAL
%
100
E
DC ERROR = AVERAGE OF OUTPUT – IDEAL
O
of
PEAK RIPPLE
reading
AVERAGE ERROR
1k
TIME
AV
, directly sets
AD637
10k
AV

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