ADT7462ACPZ-5RL7 ON Semiconductor, ADT7462ACPZ-5RL7 Datasheet - Page 71

• Manufacturer Part Number: ADT7462ACPZ-5RL7
• Description: IC TEMP/VOLT MONITOR 32-LFCSP
• Manufacturer: ON Semiconductor

Specifications of ADT7462ACPZ-5RL7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADT7462ACPZ-500RL7; ADT7462ACPZ-500RL7; ADT7462ACPZ-500RL7TR; ADT7462ACPZ-500RL7TR; ADT7462ACPZ-5RL7TR

1. POR = 0xC0, Lock = N, SW Reset = Y.
1. POR = 0x00, Lock = N, SW Reset = Y.
1. POR = 0x00, Lock = N, SW Reset = Y.
1. POR = 0x00, Lock = N, SW Reset = Y.
Table 64. Register 0x31 — Thermal Mask Register 2
Table 65. Register 0x32 — Voltage Mask Register 1
Table 66. Register 0x33 — Voltage Mask Register 2
Table 67. Register 0x34 — Fan Mask Register
[2:0]
Bit
Bit
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
3
4
5
6
7
0
1
2
3
4
5
6
7
THERM1 Assert
THERM2 Assert
THERM1 State
THERM2 State
+1.5V2 (3GIO)
Pin 15 Voltage
Pin 19 Voltage
Pin 23 Voltage
Pin 24 Voltage
Pin 25 Voltage
Pin 26 Voltage
VRD1_Assert
VRD2_Assert
+1.5V1 (ICH)
THERM1 %
THERM2 %
Fan 1 Fault
Fan 2 Fault
Fan 3 Fault
Fan 4 Fault
Fan 5 Fault
Fan 6 Fault
Fan 7 Fault
Fan 8 Fault
Reserved
+12V1
+12V2
+12V3
Name
Name
Name
Name
+3.3V
+5V
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 0.
1 masks ALERTs for the corresponding interrupt status bit. Default = 1.
1 masks ALERTs for the corresponding interrupt status bit. Default = 1.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
Reserved for future use.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
1 masks ALERTs for the corresponding interrupt status bit.
(Note 1)
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(Note 1)
(Note 1)
(Note 1)
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Description
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Description