LNBH24LQTR STMicroelectronics, LNBH24LQTR Datasheet - Page 6

• Manufacturer Part Number: LNBH24LQTR
• Description: IC LNBS DUAL SUPPLY/CTRL 32-QFN
• Manufacturer: STMicroelectronics

Specifications of LNBH24LQTR

• Applications: Converter, Analog and Digital Satellite STB Receivers/SatTV
• Voltage - Input: 8 ~ 15 V
• Number Of Outputs: 2
• Voltage - Output: 13.3V, 18.2V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10615-2

Introduction
2.5
2.6
2.7
2.8
6/25
V
22 kHz tone (see
internal 22 kHz tone generator available through the V
22 kHz transmission by DSQIN pin or by the TEN bit.The DSQIN internal circuit activates
the 22 kHz tone on the V
presence on the DSQIN pin, and it stops with 1 cycles ± 25 µs delay after the TTL signal is
expired. The V
can be controlled both through the TTX pin and by I²C bit. As soon as the tone transmission
is expired, the V
supply is always provided to the LNB from the V
PDC optional circuit for DISEQC™ 1.X applications using
V
In some applications, at light output current (< 50 mA) and in case of heavy output
capacitive load, the 22 kHz tone can be distorted. In this case it is possible to add the
"Optional" external components shown in the typical application circuit (see
DiSEqC 1.x using external 22 kHz tone generator source through EXTM pin
between V
output capacitance only when the internal 22 kHz tone is activated.
I²C interface
The main functions of the IC are controlled via I²C bus by writing 6 bits on the system
register (SR 8 bits in write mode). On the same register there are 5 bits that can be read
back (SR 8 bits in read mode) to provide the diagnostic flags of two internal monitoring
functions (OTF, OLF) and three output voltage register status (EN, VSEL, LLC) received by
the IC (see
bits (TEST1-2-3) that must be disregarded from the MCU. While, in write mode, there 2 Test
bits (TEST4-5) that must be always set LOW. Each section (A/B) has two selectable I²C
addresses selectable respectively, by the ADDR-A and ADDR-B pins (see
Address pins characteristics
Output voltage selection
When the IC sections are in stand-by mode (EN bit LOW), the power blocks are disabled.
When the regulator blocks are active (EN bit HIGH), the output can be logic controlled to be
13 or 18 V by mean of the VSEL bit (voltage SELect) for remote controlling of non-DiSEqC
LNBs. Additionally, the LNBH24L is provided with the LLC I²C bit that increase the selected
voltage value to compensate possible voltage drop along the output line. In stand-by
condition (EN bit LOW) all the I²C bits and the TTX pin must be set LOW (if the TTX pin is
not used it can be left floating but the TTX bit must be set LOW during the stand-by
condition).
Diagnostic and protection functions
The LNBH24L has two diagnostic internal functions provided via I²C bus by reading 2 bits on
the system register (SR bits in read mode). The diagnostic bits are, in normal operation (no
oTX
oTX
22 kHz signal will be superimposed to the V
signal on to EXTM pin
oRX
Section 2.8: Diagnostic and protection functions
oTX
and PDC pin. This optional circuit acts as an active pull-down discharging the
oTX
Figure 3: LNBH24L with internal tone for DiSEqC 1.X applications
pin internal circuit must be preventively set ON by the TTX function. This
must be disabled by setting the TTX to LOW. The 13 / 18 V power
oTX
).
output with 0.5 cycles ± 25 µs delay from the TTL signal
Doc ID 16857 Rev 2
oRX
oRX
pin.
DC voltage to generate the LNB output
oTX
pin must be activated during the
). In read mode there are 3 test
Table 11:
Figure 4:
) connected
LNBH24L
). The