LTC3408EDD Linear Technology, LTC3408EDD Datasheet - Page 12

• Manufacturer Part Number: LTC3408EDD
• Description: IC REG BUCK W/BYPASS TXRX 8-DFN
• Manufacturer: Linear Technology

Specifications of LTC3408EDD

• Applications: Converter, WCDMA Power Amplifier Applications
• Voltage - Input: 2.5 ~ 5 V
• Number Of Outputs: 1
• Voltage - Output: 0.3 ~ 3.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
PACKAGE DESCRIPTIO
RELATED PARTS
Substituting V
f = 1.5MHz in Equation (2) gives:
A 4.7µH inductor works well for this application. For best
efficiency choose a 660mA or greater inductor with less
than 0.2Ω series resistance.
C
LOAD(MAX)/2 at temperature and C
LTC3408
PART NUMBER
LTC3403
LTC3405/LTC3405A-1.5/
LTC3405A-1.8
LTC3406B/LTC3406B-1.5/ 1.5MHz, 600mA, (I
LTC3406B-1.8
LTC3407/LTC3407-2
LTC5505
Burst Mode is a registered trademark of Linear Technology Corporaton. ThinSOT is a trademark of Linear Technology Corporation.
12
IN
L
will require an RMS current rating of at least 0.3A ≅
=
1 5
.
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
[phone]
MHz
3.5 ±0.05
2 5
OUT
.
(
2.15 ±0.05
120
V
= 2.5V, V
U
mA
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
●
1.65 ±0.05
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
DESCRIPTION
1.5MHz, 600mA Synchronous Step-Down Regulator
with Bypass Transistor
1.5MHz, 300mA (I
Monolithic Step-Down Regulators
Step-Down Regulators with Burst Mode Defeat
1.5MHz/2.25MHz, 600mA/800mA Dual (I
Monolithic Step-Down Regulator
ThinSOT RF Power Detector with Buffered Output
(2 SIDES)
and >40dB Dynamic Range
FAX: [phone]
0.25 ± 0.05
)



U
1
–
IN
2 5
4 2
.
.
= 4.2V, I
2.38 ±0.05
(2 SIDES)
V
V
W

 =

OUT
0.50
BSC
OUT
U
OUT
) Synchronous
●
) Synchronous Monolithic
5 6
www.linear.com
.
L
will require an
0.675 ±0.05
= 120mA and
µ
8-Lead Plastic DFN (3mm × 3mm)
H
PACKAGE
OUTLINE
(Reference LTC DWG # 05-08-1698)
U
TOP MARK
(NOTE 6)
OUT
DD Package
PIN 1
0.200 REF
) Synchronous
ESR of less than 0.25Ω. In most cases, a ceramic capaci-
tor will satisfy this requirement.
TO 5V
2.7V
V
IN
DAC
10µF
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
C
CER
IN
ON TOP AND BOTTOM OF PACKAGE
COMMENTS
Up to 96% Efficiency, V
I
Up to 95% Efficiency, V
Fixed Output Voltages Available, ThinSOT
Up to 95% Efficiency, with Pulse Skipping Mode Enabled,
Fixed Output Voltages Available, ThinSOT Package
Up to 91% Efficiency, V
MS10 Package
300MHz to 3GHz, Temperatrue Compensated,
LTC5505-1: –28dBm to 18dBm,
LTC5505-2: –32dBm to 12dBm, V
Q
†
3.00 ±0.10
0.75 ±0.05
(4 SIDES)
= 20µA, I
1000pF
10k
0.00 – 0.05
2, 7
SD
5
6
1.65 ± 0.10
(2 SIDES)
< 1µA, DFN Package
V
RUN
REF
IN
LTC3408
GND
Figure 7
BOTTOM VIEW—EXPOSED PAD
0.25 ± 0.05
R = 0.115
3, 9
V
IN
IN
IN
OUT
SW
 LINEAR TECHNOLOGY CORPORATION 2003
: 2.5V to 5V, V
: 2.5V to 5.5V, I
: 2.5V to 5.5V, I
TYP
4
5
2.38 ±0.10
(2 SIDES)
4
1, 8
**
*
†
MURATA LQH32CN4R7M11
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JMK212BJ106MN
4.7µH*
CC
LT/TP 0504 1K • PRINTED IN USA
8
1
0.50 BSC
= 2.7V to 6V
3403 F07
0.38 ± 0.10
OUT
Q
Q
TM
(DD8) DFN 1203
= 20µA,
= 4µA,
: 0.3V to 3.5V,
Package
C
4.7µF
CER
V
OUT **
OUT
3408f