LTC3408EDD Linear Technology, LTC3408EDD Datasheet - Page 6

IC REG BUCK W/BYPASS TXRX 8-DFN

LTC3408EDD

Manufacturer Part Number
LTC3408EDD
Description
IC REG BUCK W/BYPASS TXRX 8-DFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3408EDD

Applications
Converter, WCDMA Power Amplifier Applications
Voltage - Input
2.5 ~ 5 V
Number Of Outputs
1
Voltage - Output
0.3 ~ 3.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-DFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC3408EDD
Manufacturer:
LINEAR
Quantity:
50
OPERATIO
FU CTIO AL DIAGRA
Main Control Loop
The LTC3408 uses a constant frequency, current mode step-
down architecture. The main (P-channel MOSFET), syn-
chronous (N-channel MOSFET) and bypass (P-channel
MOSFET) switches are internal. During normal operation,
the internal main switch is turned on each cycle when the
oscillator sets the RS latch, and turned off when the cur-
rent comparator, I
ductor current at which I
trolled by the output of error amplifier EA. When the load
current increases, it causes a slight decrease in the feed-
back voltage, FB, relative to the external reference, which
in turn, causes the EA amplifier’s output voltage to increase
until the average inductor current matches the new load cur-
rent. While the main switch is off, the synchronous switch
is turned on until the beginning of the next clock cycle.
The LTC3408 operates in forced continuous mode where
the inductor current is constantly cycled. In this mode, the
LTC3408
6
U
TO 5V
2.7V
V
IN
V
V
RUN
C
10µF
CER
REF
OUT
OUT
6
8
1
5
IN
U
REF
Figure 1. Typical Application
U
COMP
V
RUN
REF
IN
(Refer to Functional Diagram)
360k
180k
LTC3408
GND
, resets the RS latch. The peak in-
COMP
V
3403 F01
OUT
SW
1.2V
FREQ
OSC
÷
2
FB
resets the RS latch, is con-
4.7µH*
**
*
+
BCMP
MURATA LQH32CN4R7M11
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JMK212BJ106MN
W
+
EA
SLOPE
COMP
I
BCMP
+
+
C
4.7µF
CER
OUT
OSC
P-CHANNEL
**
V
3× V
600mA
OUT
REF
V
IN
0.85V
RS LATCH
+
output voltage can respond quickly to the external refer-
ence voltage by sourcing or sinking current as needed.
Controlling the Output Voltage
The output voltage can be dynamically programmed from
0.3V to 3.5V using the REF input. Because the gain to V
from REF is internally set to 3, the corresponding input
range at REF is 0.1V to 1.167V. V
during operation by driving REF with an external DAC.
When REF exceeds 1.2V, a 0.08Ω internal bypass P-channel
MOSFET connects V
drop across the inductor and the main switch.
Short-Circuit Protection
A current sense comparator monitors the current across
the bypass P-channel MOSFET with a trip current of about
2.5A. When this current is exceeded during a V
to ground, the bypass P-channel MOSFET is immediately
turned off. The propagation delay of the current sensing
comparator, I
turning off the bypass P-channel MOSFET is approxmately
100ns. Once the bypass P-channel MOSFET is off for about
10µs to 20µs, it is allowed to turn back on. The initial
current limit is then lowered to about 1.6A after the first
current limit trip. If the short to ground persists, the cur-
rent comparator will trip at the lower current limit, turning
S
R
BURST
Q
Q
SLEEP
SWITCHING
BLANKING
CIRCUIT
LOGIC
AND
BCMP
I
SHOOT-
COMP
THRU
ANTI-
I
RCMP
+
, detecting an overcurrent condition to
+
IN
to V
OUT
, dramatically reducing the
5Ω
OUT
3408 BD
can be modulated
2
7
4
9
3
V
V
SW
GND
IN
IN
OUT
short
OUT
3408f

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