ISL6312CRZ-T Intersil, ISL6312CRZ-T Datasheet - Page 31

• Manufacturer Part Number: ISL6312CRZ-T
• Description: IC CTRLR PWM 4PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6312CRZ-T

• Applications: Controller, Intel VR10, VR11, AMD CPU
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.38 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In high-speed converters, the output capacitor bank is usually
the most costly (and often the largest) part of the circuit.
Output filter design begins with minimizing the cost of this part
of the circuit. The critical load parameters in choosing the
output capacitors are the maximum size of the load step, ΔI,
the load-current slew rate, di/dt, and the maximum allowable
output-voltage deviation under transient loading, ΔV
Capacitors are characterized according to their capacitance,
ESR, and ESL (equivalent series inductance).
At the beginning of the load transient, the output capacitors
supply all of the transient current. The output voltage will
initially deviate by an amount approximated by the voltage
drop across the ESL. As the load current increases, the
voltage drop across the ESR increases linearly until the load
current reaches its final value. The capacitors selected must
have sufficiently low ESL and ESR so that the total
output-voltage deviation is less than the allowable maximum.
Neglecting the contribution of inductor current and regulator
response, the output voltage initially deviates by an amount:
The filter capacitor must have sufficiently low ESL and ESR
so that ΔV < ΔV
Most capacitor solutions rely on a mixture of high frequency
capacitors with relatively low capacitance in combination
with bulk capacitors having high capacitance but limited
high-frequency performance. Minimizing the ESL of the
high-frequency capacitors allows them to support the output
voltage as the current increases. Minimizing the ESR of the
bulk capacitors allows them to supply the increased current
with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of
the output-voltage ripple. As the bulk capacitors sink and
source the inductor AC ripple current (see “Interleaving” on
page 10 and Equation 2), a voltage develops across the bulk
capacitor ESR equal to I
capacitors are selected, the maximum allowable ripple
voltage, V
inductance.
Since the capacitors are supplying a decreasing portion of
the load current while the regulator recovers from the
transient, the capacitor voltage becomes slightly depleted.
The output inductors must be capable of assuming the entire
load current before the output voltage decreases more than
ΔV
Equation 45 gives the upper limit on L for the cases when
the trailing edge of the current transient causes a greater
ΔV ESL
L
≥
MAX
≈
ESR
. This places an upper limit on inductance.
⋅
⋅
PP(MAX)
⎛
⎝
------------------------------------------------------------------- -
di
---- -
dt
V
IN
f
+
S
ESR ΔI
–
⋅
MAX
V
N V
IN
, determines the lower limit on the
⋅
⋅
.
⋅
OUT
V
PP MAX
C,PP
(
⎞ V
⎠
⋅
31
OUT
(ESR). Thus, once the output
)
MAX
(EQ. 43)
(EQ. 44)
.
ISL6312
output-voltage deviation than the leading edge. Equation 46
addresses the leading edge. Normally, the trailing edge
dictates the selection of L because duty cycles are usually
less than 50%. Nevertheless, both inequalities should be
evaluated, and L should be selected based on the lower of
the two results. In each equation, L is the per-channel
inductance, C is the total output capacitance, and N is the
number of active channels.
Switching Frequency
There are a number of variables to consider when choosing
the switching frequency, as there are considerable effects on
the upper MOSFET loss calculation. These effects are
outlined in “MOSFETs” on page 26, and they establish the
upper limit for the switching frequency. The lower limit is
established by the requirement for fast transient response
and small output-voltage ripple as outlined in
“COMPENSATION WITHOUT LOAD-LINE REGULATION”
on page 30. Choose the lowest switching frequency that
allows the regulator to meet the transient-response
requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R
are provided to assist in selecting the correct value for R
R T
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the AC component of the current drawn by the upper
MOSFETs which is related to duty cycle and the number of
active phases.
L
L
≤
≤
2 N C V
---------------------------------
1.25 N C
---------------------------- -
=
⋅
10
1000
(
(
100
ΔI
ΔI
⋅
10
⋅
[
10.61
FIGURE 22. R
)
10
)
2
2
⋅
⋅
O
⋅
–
⋅
ΔV
(
1.035
ΔV
MAX
SWITCHING FREQUENCY (Hz)
MAX
⋅
T
100
log
–
vs SWITCHING FREQUENCY
–
(
ΔI ESR
(
(
f S
ΔI ESR
⋅
T
. Figure 22 and Equation 47
)
⋅
)
]
)
)
⋅
⎛
⎝
V
1k
IN
–
V
O
⎞
⎠
February 1, 2011
(EQ. 45)
(EQ. 46)
10k
(EQ. 47)
FN9289.6
T
.