MAX8770GTL+T Maxim Integrated Products, MAX8770GTL+T Datasheet - Page 22
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MAX8770GTL+T
Manufacturer Part Number
MAX8770GTL+T
Description
IC CTLR PS 2/1PH QUICK PWM 40QFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX8770GTLT.pdf
(47 pages)
Specifications of MAX8770GTL+T
Applications
Controller, Intel IMVP-6
Voltage - Input
4 ~ 26 V
Number Of Outputs
1
Voltage - Output
0.125 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PWM Controller for IMVP-6+ CPU Core Power Supplies
CONFIDENTIAL INFORMATION – RESTRICTED TO INTEL
CCI, allowing adjustment of the integration time con-
stant with a compensation network connected between
CCI and FB. The resulting compensation current and
voltage are determined by the following equations:
where Z
secondary on-time one-shot uses this integrated signal
(V
time. When the main and secondary current-sense sig-
nals (V
become unbalanced, the transconductance amplifiers
adjust the secondary on-time, which increases or
decreases the secondary inductor current until the cur-
rent-sense signals are properly balanced:
This algorithm results in a nearly constant switching fre-
quency and balanced inductor currents, despite the lack
of a fixed-frequency clock generator. The benefits of a
constant switching frequency are twofold: first, the fre-
quency can be selected to avoid noise-sensitive regions
such as the 455kHz IF band; second, the inductor ripple-
current operating point remains relatively constant,
resulting in easy design methodology and predictable
output voltage ripple. The on-time one-shots have good
accuracy at the operating points specified in the
Electrical Characteristics table. On-times at operating
points far removed from the conditions specified in the
Electrical Characteristics table can vary over a wider
range. For example, the 600kHz setting typically runs
about 5% slower, with inputs much greater than +12V
due to the very short on-times required.
On-times translate only roughly to switching frequen-
cies. The on-times guaranteed in the Electrical
Characteristics table are influenced by switching
delays in the external high-side MOSFET. Resistive
losses, including the inductor, both MOSFETs, output
capacitor ESR, and PC board copper losses in the out-
put and ground tend to raise the switching frequency at
higher output currents. Also, the dead-time effect
increases the effective on-time, reducing the switching
frequency. It occurs only during forced-PWM operation
and dynamic output-voltage transitions when the induc-
22
CCI
t
ON SEC
______________________________________________________________________________________
I
CCI
) to set the secondary high-side MOSFETs on-
(
+ (Secondary Current Balance Correction)
CM
CCI
MAX8770/MAX8771/MAX8772 Dual-Phase, Quick-
= G
)
= V
=
=
is the impedance at the CCI output. The
M
T
T
CMP
(V
SW
SW
V
CMP
CCI
= (Main On-Time)
⎛
⎜
⎝
⎛
⎜
⎝
- V
V
V
= V
CCI
FB
- V
CMN
FB
CMN
+
+
V
V
IN
IN
0 075
+ I
0 075
.
and V
) - G
.
CCI
V
M
Z
V
⎞
⎟ +
⎠
CCI
CS
⎞
⎟
⎠
(V
T
CSP
= V
SW
⎛
⎜
⎝
- V
CSP
I
CCI CCI
CSN
V
Z
IN
-V
)
CSM
⎞
⎟
⎠
)
tor current reverses at light or negative load currents.
With reversed inductor current, the inductor’s EMF
causes LX to go high earlier than normal, extending the
on-time by a period equal to the DH-rising dead time.
For loads above the critical conduction point, where the
dead-time effect is no longer a factor, the actual switch-
ing frequency (per phase) is:
where V
the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; V
the sum of the parasitic voltage drops in the inductor
charge path, including high-side switch, inductor, and
PC board resistances; and t
mined above.
The output current of each phase is sensed. Low-offset
amplifiers are used for current balance, voltage-posi-
tioning gain, and current limit. Sensing the current at
the output of each phase offers advantages, including
less noise sensitivity, more accurate current sharing
between phases, and the flexibility of using either a
current-sense resistor or the DC resistance of the out-
put inductor.
Using the DC resistance (R
allows higher efficiency. In this configuration, the initial
tolerance and temperature coefficient of the inductor’s
DCR must be accounted for in the output-voltage
droop-error budget and power monitor. This current-
sense method uses an RC filtering network to extract
the current information from the output inductor (see
Figure 3). The resistive divider used should provide a
current-sense resistance (R
current-limit requirements, and the time constant of the
RC network should match the inductor’s time constant
(L/R
where R
and R
the worst-case inductance and R
by the inductor manufacturer, adding some margin for
the inductance drop over temperature and load. To
CS
DCR
):
DIS
CS
is the inductor’s series DC resistance. Use
f
is the sum of the parasitic voltage drops in
SW
is the required current-sense resistance,
R
R
=
CS
CS
t
ON IN
=
=
⎛
⎜
⎝
®
C
(
V
R
(
L
EQ
V
1
IMVP-6 LICENSEES
OUT
R
+
+
2
R
⎡
⎢
⎣
V
R
CS
2
DCR
1
DIS
ON
1
+
⎞
⎟
⎠
) low enough to meet the
R
+
V
DIS
DCR
−
is the on-time as deter-
) of the output inductor
R
1
2
V
DCR
)
CHG
⎤
⎥
⎦
Current Sense
and
values provided
)
CHG
is