MAX8770GTL+T Maxim Integrated Products, MAX8770GTL+T Datasheet - Page 25

• Manufacturer Part Number: MAX8770GTL+T
• Description: IC CTLR PS 2/1PH QUICK PWM 40QFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8770GTL+T

• Applications: Controller, Intel IMVP-6
• Voltage - Input: 4 ~ 26 V
• Number Of Outputs: 1
• Voltage - Output: 0.125 ~ 1.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PWM Controller for IMVP-6+ CPU Core Power Supplies
The MAX8770/MAX8771/MAX8772 include differential,
remote-sense inputs to eliminate the effects of voltage
drops along the PC board traces and through the
processor’s power pins. The feedback-sense node
connects to the voltage-positioning resistor (R
ground-sense (GNDS) input connects to an amplifier
that adds an offset directly to the target voltage, effec-
tively adjusting the output voltage to counteract the
voltage drop in the ground path. Connect the voltage-
positioning resistor (R
input directly to the processor’s remote-sense outputs
as shown in Figure 1.
An integrator amplifier forces the DC average of the FB
voltage to equal the target voltage. This transconduc-
tance amplifier integrates the feedback voltage and pro-
vides a fine adjustment to the regulation voltage (Figure
2), allowing accurate DC output-voltage regulation
regardless of the output ripple voltage. The integrator
amplifier has the ability to shift the output voltage by
±60mV (typ), including DC offset and AC ripple. The inte-
gration time constant can be set easily with an external
compensation capacitor at the CCV pin. Use a 470pF x
(2/η
The MAX8770/MAX8771/MAX8772 disable the integra-
tor by connecting the amplifier inputs together at the
beginning of all VID transitions done in pulse-skipping
mode (DPRSLPVR = high). The integrator remains dis-
abled until 20µs after the transition is completed (the
internal target settles) and the output is in regulation
(edge detected on the error comparator).
When a transient occurs, the response time of the con-
troller depends on how quickly it can slew the inductor
current. Multiphase controllers that remain 180° out-of-
phase when a transient occurs actually respond slower
than an equivalent single-phase controller. In order to
provide fast transient response, the MAX8770/
MAX8771/MAX8772 support a phase-overlap mode that
allows the dual regulators to operate in-phase when
CONFIDENTIAL INFORMATION – RESTRICTED TO INTEL
TOTAL
MAX8770/MAX8771/MAX8772 Dual-Phase, Quick-
) x 300kHz/f
______________________________________________________________________________________
Transient-Overlap Operation
SW
FB
or greater ceramic capacitor.
), and ground sense (GNDS)
Differential Remote Sense
Integrator Amplifier
FB
). The
heavy load transients are detected, effectively reducing
the response time. After either high-side MOSFET turns
off, if the output voltage does not exceed the regulation
voltage when the minimum off-time expires, the controller
simultaneously turns on both high-side MOSFETs during
the next on-time cycle. This maximizes the total inductor
current slew rate. The phases remain overlapped until
the output voltage exceeds the regulation voltage after
the minimum off-time expires.
After the phase-overlap mode ends, the controller
automatically begins with the opposite phase. For
example, if the secondary phase provided the last on-
time pulse before overlap operation began, the con-
troller starts switching with the main phase when
overlap operation ends.
The nominal no-load output voltage (V
defined by the selected voltage reference (VID DAC)
plus the remote ground-sense adjustment (V
defined in the following equation:
where V
MAX8770/MAX8771/MAX8772 slew the target voltage
from ground to the preset boot voltage.
The digital-to-analog converter (DAC) programs the out-
put voltage using the D0–D6 inputs. D0–D6 are low-volt-
age (1.0V) logic inputs, designed to interface directly
with the CPU. Do not leave D0–D6 unconnected.
Changing D0–D6 initiates a transition to a new output-
voltage level. Change D0–D6 together, avoiding greater
than 20ns skew between bits. Otherwise, incorrect DAC
readings may cause a partial transition to the wrong volt-
age level followed by the intended transition to the cor-
rect voltage level, lengthening the overall transition time.
The available DAC codes and resulting output voltages
are compatible with the IMVP-6 (Table 4) specifications.
DAC
Nominal Output-Voltage Selection
V
is the selected VID voltage. On startup, the
TARGET
®
=
V
IMVP-6 LICENSEES
FB
=
V
DAC
DAC Inputs (D0–D6)
+
V
GNDS
TARGET
GNDS
), as
) is
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