MAX8770GTL+T Maxim Integrated Products, MAX8770GTL+T Datasheet - Page 37

• Manufacturer Part Number: MAX8770GTL+T
• Description: IC CTLR PS 2/1PH QUICK PWM 40QFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8770GTL+T

• Applications: Controller, Intel IMVP-6
• Voltage - Input: 4 ~ 26 V
• Number Of Outputs: 1
• Voltage - Output: 0.125 ~ 1.5 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PWM Controller for IMVP-6+ CPU Core Power Supplies
The MAX8770/MAX8771/MAX8772 also feature an
independent comparator with an accurate threshold
(V
0.3V
dent of the V
tor- and thermistor-divider between V
generate a voltage-regulator overtemperature monitor.
Place the thermistor as close to the MOSFETs and
inductors as possible.
The OVP circuit is designed to protect the CPU against
a shorted high-side MOSFET by drawing high current
and blowing the battery fuse. The MAX8770/MAX8771
continuously monitor the output for an overvoltage fault.
The controller detects an OVP fault if the output voltage
exceeds the set VID DAC voltage by more than 300mV,
regardless of the operating state. During pulse-skip-
ping operation (DPRSLPVR = high), the OVP threshold
is set at 1.8V once a downward VID transition occurs,
and reverts to track the VID DAC voltage when the out-
put reaches the set VID code.
When the OVP circuit detects an overvoltage fault while
in multiphase mode (DPRSLPVR = low, PSI = high), the
MAX8770/MAX8771 immediately force DL1 and DL2
high and pull DH1 and DH2 low. This action turns on
the synchronous-rectifier MOSFETs with 100% duty
and, in turn, rapidly discharges the output filter capaci-
tor and forces the output low. If the condition that
caused the overvoltage (such as a shorted high-side
MOSFET) persists, the battery fuse blows. Toggle
SHDN or cycle the V
clear the fault latch and reactivate the controller.
When an overvoltage fault occurs while in 1-phase
operation (DPRSLPVR = high, or PSI = low), the
MAX8770/MAX8771 immediately force DL1 high and
pull DH1 low. DL2 and DH2 remain low as phase 2 was
disabled. DL2 is forced high only when the output falls
below the UV threshold. Overvoltage protection can be
disabled through the no-fault test mode (see the No-
Fault Test Mode section).
The output UVP function is similar to foldback current
limiting, but employs a timer rather than a variable cur-
rent limit. If the MAX8770/MAX8771/MAX8772 output
voltage is 400mV below the target voltage, the con-
troller activates the shutdown sequence and sets the
fault latch. Once the controller ramps down to zero, it
CONFIDENTIAL INFORMATION – RESTRICTED TO INTEL
HOT
CC
) that tracks the analog supply voltage (V
). This makes the thermal trip threshold indepen-
MAX8770/MAX8771/MAX8772 Dual-Phase, Quick-
Temperature Comparator ( VRHOT )
Output Overvoltage Protection (MAX8770/
CC
supply voltage tolerance. Use a resis-
______________________________________________________________________________________
Fault Protection (Latched)
Output Undervoltage Protection
CC
power supply below 0.5V to
CC
MAX8771 Only)
and GND to
HOT
=
forces the DL1 and DL2 high and pulls DH1 and DH2
low. Toggle SHDN or cycle the V
below 0.5V to clear the fault latch and reactivate the
controller.
UVP can be disabled through the no-fault test mode
(see the No-Fault Test Mode section).
The MAX8770/MAX8771/MAX8772 feature a thermal-
fault-protection circuit. When the junction temperature
rises above +160°C, a thermal sensor sets the fault
latch and activates the soft-shutdown sequence. Once
the controller ramps down to zero, it forces the DL1 and
DL2 high and pulls DH1 and DH2 low. Toggle SHDN or
cycle the V
fault latch and reactivate the controller after the junction
temperature cools by 15°C.
Thermal shutdown can be disabled through the no-fault
test mode (see the No-Fault Test Mode section).
The latched fault-protection features can complicate
the process of debugging prototype breadboards
since there are (at most) a few milliseconds in which to
determine what went wrong. Therefore, a “no-fault” test
mode is provided to disable the fault protection—over-
voltage protection, undervoltage protection, and ther-
mal shutdown. Additionally, the test mode clears the
fault latch if it has been set. The no-fault test mode is
entered by forcing 11V to 13V on SHDN.
The DH and DL drivers are optimized for driving mod-
erate-sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in notebook applications where a large V
differential exists. The high-side gate drivers (DH)
source and sink 2.2A, and the low-side gate drivers
(DL) source 2.7A and sink 8A. This ensures robust gate
drive for high-current applications. The DH_ floating
high-side MOSFET drivers are powered by internal
boost switch charge pumps at BST_, while the DL_ syn-
chronous-rectifier drivers are powered directly by the
5V bias supply (V
Adaptive dead-time circuits monitor the DL and DH dri-
vers and prevent either FET from turning on until the
other is fully off. The adaptive driver dead time allows
operation without shoot-through with a wide range of
MOSFETs, minimizing delays and maintaining efficiency.
There must be a low-resistance, low-inductance path
from the DL and DH drivers to the MOSFET gates for
the adaptive dead-time circuits to work properly; other-
wise, the sense circuitry in the MAX8770/
CC
power supply below 0.5V to clear the
DD
).
®
IMVP-6 LICENSEES
MOSFET Gate Drivers
Thermal-Fault Protection
No-Fault Test Mode
CC
power supply
IN
- V
OUT
37