L6926 STMicroelectronics, L6926 Datasheet - Page 7

IC REG HE SYNC STEP DOWN 8-MSOP

L6926

Manufacturer Part Number
L6926
Description
IC REG HE SYNC STEP DOWN 8-MSOP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheets

Specifications of L6926

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.6 ~ 5.5 V
Current - Output
800mA
Frequency - Switching
600kHz
Voltage - Input
2 ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Power - Output
450mW
Mounting Style
SMD/SMT
High Efficiency
up to 95%
Low Drop-out Operation
up to 100% duty cycle
For Use With
497-4737 - BOARD EVAL L6926 STEP DOWN REG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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L6926
4
4.1
Operation description
The main loop uses slope compensated PWM current mode architecture. Each cycle the
high side MOSFET is turned on, triggered by the oscillator, so that the current flowing
through it (the same as the inductor current) increases. When this current reaches the
threshold (set by the output of the error amplifier E/A), the peak current limit comparator
PEAK_CL turns off the high side MOSFET and turns on the low side one until the next clock
cycle begins or the current flowing through it goes down to zero (ZERO CROSSING
comparator). The peak inductor current required to trigger PEAK_CL depends on the slope
compensation signal and on the output of the error amplifier.
In particular, the error amplifier output depends on the V
current increases, the output capacitor is discharged and so the V
produces increase of the error amplifier output, so allowing a higher value for the peak
inductor current. For the same reason, when due to a load transient the output current
decreases, the error amplifier output goes low, so reducing the peak inductor current to
meet the new load requirements.
The slope compensation signal allows the loop stability also in high duty cycle conditions
(see related section).
Figure 3.
Modes of operation
Depending on the SYNC pin value the device can operate in low consumption or low noise
mode. If the SYNC pin is high (higher than 1.3 V) the low consumption mode is selected
while the low noise mode is selected if the SYNC pin is low (lower than 0.5 V).
COM P
COM P
P
P
GOOD
GOOD
FB
FB
Device block diagram
V
V
V
V
REF
REF
REF
REF
0.6V
0.6V
0.9V
0.9V
CONSUM PTION
CONSUM PTION
NOISE/
NOISE/
SYNC
SYNC
LOW
LOW
E/A
E/A
P
P
GOOD
GOOD
OVP
OVP
Doc ID 9302 Rev 9
CONTROL
CONTROL
LOOP
LOOP
OSCILLATOR
OSCILLATOR
ZERO
ZERO
CROSSING
CROSSING
RUN
RUN
GND
GND
VALLEY
VALLEY
PEAK
PEAK
CL
CL
CL
CL
GND
GND
Vcc
Vcc
SLOPE
SLOPE
FB
SENSE
SENSE
SENSE
SENSE
P
P
N
N
MOS
MOS
MOS
MOS
pin voltage. When the output
DRIVER
DRIVER
GND
GND
Vcc
Vcc
FB
Operation description
pin decreases. This
VCC
VCC
GND
GND
POWER
POWER
POWER
POWER
P
P
N
N
MOS
MOS
MOS
MOS
LX
LX
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