L5981 STMicroelectronics, L5981 Datasheet - Page 18

IC REG SW STEP DOWN 1A 8-VFQFPN

L5981

Manufacturer Part Number
L5981
Description
IC REG SW STEP DOWN 1A 8-VFQFPN
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L5981

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.6 ~ 18 V
Current - Output
1A
Frequency - Switching
250kHz ~ 1MHz
Voltage - Input
2.9 ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-VFQFN, 8-VFQFPN
Power - Output
1.5W
Output Voltage
3 V
Output Current
1 A
Input Voltage
2.9 V to 18 V
Switching Frequency
220 KHz to 275 KHz
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Duty Cycle (max)
100 %
Low Dropout Operation
100 % duty cycle
For Use With
497-6385 - BOARD EVAL FOR L5981
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L5981
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
L5981TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
L5981TR
Manufacturer:
STM
Quantity:
2
Application information
5.4.1
18/37
Equation 13
where:
Equation 14
Equation 15
As seen in
following paragraph the guidelines to select the type II and type III compensation network
are illustrated.
Type III compensation network
The methodology to stabilize the loop consists of placing two zeros to compensate the effect
of the LC double pole, so increasing phase margin; then to place one pole in the origin to
minimize the dc error on regulated output voltage; finally to place other poles far away the
zero dB frequency.
If the equivalent series resistance (ESR) of the output capacitor introduces a zero with a
frequency higher than the desired bandwidth (that is: 2π * ESR * COUT < 1 / BW), the type
III compensation network is needed. Multi Layer Ceramic capacitors (MLCC) have very low
ESR (<1 mΩ), with very high frequency zero, so type III network is adopted to compensate
the loop.
In
(f
Equation 16
Z1
Figure 10
, f
Z2
) and three poles (f
Chapter 4.3
the type III compensation network is shown. This network introduces two zeros
f
Q
LC
=
=
----------------------------------------------------------------------------------------- -
----------------------------------------------------------------------- -
two different kind of network can compensate the loop. In the two
R
f
Z1
OUT
P0
L
=
L C
G
, f
+
----------------------------------------------- -
2π C
LC
L C
C
Doc ID 13004 Rev 6
P1
OUT
s ( )
OUT
, f
1
OUT
P2
3
=
). They expression are:
R
1
(
R
------------------------------------------------------------------------ -
1
OUT
1
1
+
(
+
R
+
----------------------------
2π Q f ⋅
-------------- -
R
OUT
ESR
R
OUT
E SR
3
1
)
s
,
+
+
,
------------------------- -
2π f
ESR
LC
f
Z2
f
s
+
zESR
zESR
)
,
=
------------------ -
2π f
----------------------------- -
2π R
s
=
LC
------------------------------------------- -
2π ESR C
1
R
4
OUT
2
C
4
1
=
V
--------------
I
OUT
OUT
OUT
L5981

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