IDT89HPES16NT2ZBBCG IDT, Integrated Device Technology Inc, IDT89HPES16NT2ZBBCG Datasheet

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IDT89HPES16NT2ZBBCG

Manufacturer Part Number
IDT89HPES16NT2ZBBCG
Description
IC PCI SW 16LANE 2PORT 484-CABGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT89HPES16NT2ZBBCG

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
89HPES16NT2ZBBCG

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Part Number:
IDT89HPES16NT2ZBBCG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT89HPES16NT2ZBBCG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Device Overview
PCI Express® switching solutions offering the next-generation I/O inter-
connect standard. The PES16NT2 is a 16-lane, 2-port peripheral chip
that provides high-performance switching and non-transparent bridging
(NTB) functions between a PCIe® upstream port and an NTB down-
stream port. The PES16NT2 is a part of the IDT PCIe System Intercon-
nect Products and is intended to be used with IDT PCIe System
Interconnect Switches. Together, the chipset targets multi-host and intel-
ligent I/O applications such as communications, storage, and blade
servers where inter-domain communication is required.
Features
Block Diagram
© 2009 Integrated Device Technology, Inc.
The 89HPES16NT2 is a member of the IDT PRECISE™ family of
– Sixteen PCI Express lanes (2.5Gbps), two switch ports
– Delivers 64 Gbps (8 GBps) of aggregate switching capacity
– Low latency cut-through switch architecture
– Support for Max Payload size up to 2048 bytes
– Supports one virtual channel and eight traffic classes
– PCI Express Base specification Revision 1.0a compliant
– Supports automatic per port link width negotiation (x8, x4, x2,
– Static lane reversal on all ports
– Automatic polarity inversion on all lanes
High Performance PCI Express Switch
Flexible Architecture with Numerous Configuration Options
or x1)
SerDes
Logical
Frame Buffer
Layer
Phy
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Multiplexer / Demultiplexer
®
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
x8 Upstream Port and One x8 Downstream Port
Phy
16-Lane 2-Port Non-Transparent
PCI Express® Switch
...
SerDes
Logical
Layer
Route Table
Phy
Figure 1 Internal Block Diagram
16 PCI Express Lanes
2-Port Switch Core
1 of 29
Arbitration
– Supports locked transactions, allowing use with legacy soft-
– Ability to load device configuration from serial EEPROM
– Ability to control device via SMBus
– Crosslink support on NTB port
– Four mapping windows supported
– Interprocessor communication
– Allows up to sixteen masters to communicate through the non-
– No limit on the number of supported outstanding transactions
– Completely symmetric non-transparent bridge operation
– Supports direct connection to a transparent or non-transparent
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
– Integrates sixteen 2.5 Gbps embedded full duplex SerDes, 8B/
Non-Transparent Port
Highly Integrated Solution
Port
ware
• Each may be configured as a 32-bit memory or I/O window
• May be paired to form a 64-bit memory window
• Thirty-two inbound and outbound doorbells
• Four inbound and outbound message registers
• Two shared scratchpad registers
transparent port
through the non-transparent bridge
allows similar/same configuration software to be run
port of another switch
queueing
10B encoder/decoder (no separate transceivers needed)
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
...
Scheduler
Transparent
SerDes
Logical
Layer
Phy
Bridge
Non-
89HPES16NT2
January 5, 2009
Data Sheet
DSC 6925

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IDT89HPES16NT2ZBBCG Summary of contents

Page 1

Device Overview The 89HPES16NT2 is a member of the IDT PRECISE™ family of PCI Express® switching solutions offering the next-generation I/O inter- connect standard. The PES16NT2 is a 16-lane, 2-port peripheral chip that provides high-performance switching and non-transparent bridging ...

Page 2

IDT 89HPES16NT2 Data Sheet ◆ Reliability, Availability, and Serviceability (RAS) Features – Internal end-to-end parity protection on all TLPs ensures data integrity even in systems that do not implement end-to-end CRC (ECRC) – Supports ECRC pass-through – Supports Hot-Swap ◆ ...

Page 3

IDT 89HPES16NT2 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES16NT2. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 4

IDT 89HPES16NT2 Data Sheet Signal MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] Type Name/Description I Master SMBus Address. These pins determine the SMBus address of the serial EEPROM from which configuration information ...

Page 5

IDT 89HPES16NT2 Data Sheet Signal CCLKDS CCLKUS MSMBSMODE PENTBRSTN PERSTN RSTHALT SWMODE[3:0] Signal JTAG_TCK JTAG_TDI Type Name/Description I Common Clock Downstream. When the CCLKDS pin is asserted, it indi- cates that a common clock is being used between the downstream ...

Page 6

IDT 89HPES16NT2 Data Sheet Signal JTAG_TDO JTAG_TMS JTAG_TRST_N Signal V CORE APE Type Name/Description O JTAG Data Output. This is the serial data shifted out from ...

Page 7

IDT 89HPES16NT2 Data Sheet Pin Characteristics Note: Some input pads of the PES16NT2 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 8

IDT 89HPES16NT2 Data Sheet Logic Diagram — PES16NT2 Reference Clocks PCI Express Switch SerDes Input Port A PCI Express Switch SerDes Input Port C Master SMBus Interface SSMBADDR[5,3:1] Slave SMBus Interface System Functions 2 PEREFCLKP 2 PEREFCLKN REFCLKM PEALREV PEARP[0] ...

Page 9

IDT 89HPES16NT2 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 12 and 13. Parameter Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of input ...

Page 10

IDT 89HPES16NT2 Data Sheet Parameter T Max time between jitter median & max deviation RX-EYE-MEDIUM TO MAX JITTER T Unexpected Idle Enter Detect Threshold Integration Time RX-IDLE-DET-DIFF- ENTER TIME T Lane to lane input skew RX-SKEW 1. Minimum, Typical, and ...

Page 11

IDT 89HPES16NT2 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol Parameter V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI ...

Page 12

IDT 89HPES16NT2 Data Sheet Recommended Operating Temperature Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 14. Maximum power is measured under the following conditions: ...

Page 13

IDT 89HPES16NT2 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 12. Note: See Table 7, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V ...

Page 14

IDT 89HPES16NT2 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN ...

Page 15

IDT 89HPES16NT2 Data Sheet Package Pinout — 484-BGA Signal Pinout for PES16NT2 The following table lists the pin numbers and signal names for the PES16NT2 device. Pin Function Alt Pin A1 V B13 B14 ...

Page 16

IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin G5 V H20 H21 H22 G10 G11 G12 V ...

Page 17

IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin N21 V PE R14 TT N22 V PE R15 TT P1 PEREFCLKP0 R16 P2 PEREFCLKN0 R17 P3 V R18 R19 R20 R21 ...

Page 18

IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin Y15 RSTHALT AA6 Y16 GPIO_02 1 AA7 Y17 GPIO_05 1 AA8 Y18 MSMBSMODE AA9 Y19 V AA10 SS Y20 V AA11 SS Y21 PEREFCLKP1 AA12 Y22 PEREFCLKN1 AA13 AA1 V AA14 SS ...

Page 19

IDT 89HPES16NT2 Data Sheet Power Pins V Core V Core J10 C3 J12 C20 J14 C21 K3 C22 K11 E4 K13 F3 K15 ...

Page 20

IDT 89HPES16NT2 Data Sheet Ground Pins D13 A8 D15 A10 D17 A12 D19 A14 D20 A16 E3 A18 E5 A20 E6 A21 E11 A22 E14 B1 E17 B2 E18 ...

Page 21

IDT 89HPES16NT2 Data Sheet Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE PEALREV PEARN00 PEARN01 PEARN02 PEARN03 PEARN04 PEARN05 PEARN06 PEARN07 ...

Page 22

IDT 89HPES16NT2 Data Sheet Signal Name PEARP03 PEARP04 PEARP05 PEARP06 PEARP07 PEATN00 PEATN01 PEATN02 PEATN03 PEATN04 PEATN05 PEATN06 PEATN07 PEATP00 PEATP01 PEATP02 PEATP03 PEATP04 PEATP05 PEATP06 PEATP07 PECLREV PECRN00 PECRN01 PECRN02 PECRN03 PECRN04 PECRN05 PECRN06 PECRN07 PECRP00 PECRP01 PECRP02 PECRP03 ...

Page 23

IDT 89HPES16NT2 Data Sheet Signal Name PECRP06 PECRP07 PECTN00 PECTN01 PECTN02 PECTN03 PECTN04 PECTN05 PECTN06 PECTN07 PECTP00 PECTP01 PECTP02 PECTP03 PECTP04 PECTP05 PECTP06 PECTP07 PENTBRSTN PEREFCLKN0 PEREFCLKN1 PEREFCLKP0 PEREFCLKP1 PERSTN REFCLKM RSTHALT SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT I/O Type ...

Page 24

IDT 89HPES16NT2 Data Sheet Signal Name SWMODE_0 SWMODE_1 SWMODE_2 SWMODE_3 V CORE APE I/O Type Location I AA13 I Y13 I AB14 I AA14 See Table ...

Page 25

IDT 89HPES16NT2 Data Sheet PES16NT2 Pinout — Top View ...

Page 26

IDT 89HPES16NT2 Data Sheet PES16NT2 Package Drawing — 484-Pin BC484/BCG484 January 5, 2009 ...

Page 27

IDT 89HPES16NT2 Data Sheet PES16NT2 Package Drawing — Page Two January 5, 2009 ...

Page 28

IDT 89HPES16NT2 Data Sheet Revision History April 15, 2008: Initial publication of data sheet. January 5, 2009: On the Ordering Information page, changed silicon revision from January 5, 2009 ...

Page 29

IDT 89HPES16NT2 Data Sheet Ordering Information A AAA NN Product Operating Device Family Family Voltage Valid Combinations 89HPES16NT2ZBBC 484-ball CABGA package, Commercial Temperature 89HPES16NT2ZBBCG 484-ball Green CABGA package, Commercial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA ...

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