IDT72V51356L7-5BB8 IDT, Integrated Device Technology Inc, IDT72V51356L7-5BB8 Datasheet - Page 12
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IDT72V51356L7-5BB8
Manufacturer Part Number
IDT72V51356L7-5BB8
Description
IC FLOW CTRL MULTI QUEUE 256-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT72V51336L7-5BB8.pdf
(57 pages)
Specifications of IDT72V51356L7-5BB8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72V51356L7-5BB8
PIN DESCRIPTIONS (CONTINUED)
NOTES:
1. Inputs should not change after Master Reset.
2. These pins are for the JTAG port. Please refer to pages 52-56 and Figures 31-33.
IDT72V51336/72V51346/72V51356 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
WEN
WRADD
[5:0]
Symbol
V
GND
CC
Write Enable
Write Address Bus
+3.3V Supply
Ground Pin
Name
I/O TYPE
Ground
LVTTL
INPUT
INPUT
LVTTL
Power
to be written to can be selected via WCLK, WADEN and the WRADD address bus regardless of the
The WEN input enables write operations to a selected queue based on a rising edge of WCLK. A queue
state of WEN. Data present on Din can be written to a newly selected queue on the second WCLK cycle
after queue selection provided that WEN is LOW. A write enable is not required to cycle the PAFn bus
(in polled mode) or to select the device , (in direct mode).
For the 8Q device the WRADD bus is 6 bits. The WRADD bus is a dual purpose address bus. The first
function of WRADD is to select a queue to be written to. The least significant 3 bits of the bus, WRADD[2:0]
are used to address 1 of 8 possible queues within a multi-queue device. The most significant 3 bits,
WRADD[5:3] are used to select 1 of 8 possible multi-queue devices that may be connected in expansion
mode. These 3 MSb’s will address a device with the matching ID code. The address present on the WRADD
bus will be selected on a rising edge of WCLK provided that WADEN is HIGH, (note, that data present on
the Din bus can be written into the previously selected queue on this WCLK edge and on the next rising
WCLK also, providing that WEN is LOW). Two WCLK rising edges after write queue elect, data can be
written into the newly selected queue.
The second function of the WRADD bus is to select the device of queues to be loaded on to the PAFn bus
during strobed flag mode. The most significant 3 bits, WRADD[5:3] are again used to select 1 of 8 possible
multi-queue devices that may be connected in expansion mode. Address bits WRADD[2:0] are don’t care
during device selection. The device address present on the WRADD bus will be selected on the rising
edge of WCLK provided that FSTR is HIGH, (note, that data can be written into the previously selected
queue on this WCLK edge). Please refer to Table 1 for details on the WRADD bus.
These are V
These are Ground pins and must all be connected to the GND supply rail.
CC
power supply pins and must all be connected to a +3.3V supply rail.
12
Description
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES