IDT72T6480L7-5BB IDT, Integrated Device Technology Inc, IDT72T6480L7-5BB Datasheet - Page 50

• Manufacturer Part Number: IDT72T6480L7-5BB
• Description: IC FLOW-CTRL 48BIT 7-5NS 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72T6480L7-5BB

• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 324
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T6480L7-5BB

WIDTH EXPANSION CONFIGURATION
SFCs in width expansion to support bus-widths greater than 36-bits. This
configuration connects the input and output bus of two devices together to create
a wider bus. The read and write clocks for each device are driven with a clock
driver. The empty and full flags of both devices are connected to a logic gate
(AND/OR) depending on whether IDT Standard mode or FWFT mode is
selected. Because of the variation in skew between the read clock and write
NOTES:
1. Use an AND gate in IDT Standard mode, an OR gate in FWFT mode.
2. Do not connect any output signals directly together.
IDT72T6480 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE
x12, x24, x48 BIT WIDE CONFIGURATION
The sequential flow-control (SFC) device can be connected with another
Clock Driver
IDT5T905
Clock Driver
IDT5T905
Gate
(1)
Full Flag/Input Ready
Figure 36. Width Expansion Configuration in IDT Standard Mode and FWFT Mode
Full Flag/Input Ready
Write Clock
Write Enable
Data Inputs
Write Clock
64
36
36
WCLK
WEN
FF / IR
Dn
WCLK
WEN
FF / IR
Dn
SFC
SFC
50
clock, it is possible for EF/FF deassertion and IR/OR assertion to vary from one
cycle between the devices. The logic gate connected to the status flags will create
a composite flag that will update the status of both SFC devices to represent a
more accurate status of the configuration. To minimize the skew between the
two write and read clocks, a clock driver (IDT5T905 recommended) is used
to drive the input clocks for both SFC devices. Figure 36 illustrates the width
expansion configuration.
RCLK
REN
EF / OR
Qn
RCLK
REN
EF / OR
Qn
36
36
Read Clock
Read Enable
Empty Flag/Output Ready
Data Outputs
Empty Flag/Output Ready
Read Clock
64
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
6358 drw44
FEBRUARY 10, 2009
Clock Driver
IDT5T905
Clock Driver
IDT5T905
Gate
(1)