SDCFH-1024-388 SanDisk, SDCFH-1024-388 Datasheet - Page 23

• Manufacturer Part Number: SDCFH-1024-388
• Description: COMPACT FLASH 1GB ULTRA II
• Manufacturer: SanDisk

Specifications of SDCFH-1024-388

• Memory Size: 1GB
• Memory Type: CompactFLASH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2007 SanDisk Corporation
SanDisk CompactFlash Card OEM Product Manual
Table 3-4
-CSEL
(True IDE Mode)
D15-D00
(PC Card Memory Mode)
(PC Card I/O Mode)
D15-D00
(True IDE Mode)
GND
(PC Card Memory Mode)
(PC Card I/O Mode )
(True IDE Mode )
-INPACK
(PC Card Memory Mode)
-INPACK
(PC Card I/O Mode )
-DMARQ
(True IDE Mode )
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
(True IDE Mode)
-IOWR
(PC Card Memory Mode)
Signal Name
Signal Description
Dir.
I/O
O
--
I
I
31, 30, 29, 28, 27,
49, 48, 47, 6, 5, 4,
3, 2, 23, 22, 21
1, 50
Pin
43
34
35
3-5
This internally pulled up signal is used to
configure this device as a master or slave when
configured in the True IDE Mode. When this pin
is grounded, this device is configured as a
master. When the pin is open, this device is
configured as a slave.
These lines carry the data, commands and
status information between the host and the
controller. D00 is the LSB of the Even Byte of
the word. D08 is the LSB of the Odd Byte of the
word.
In True IDE Mode, all Task File operations
occur in byte mode on the low order bus D00­
D07 while all data transfers are 16 bits using
D00-D15.
Ground.
This signal is not used in this mode.
The Input Acknowledge signal is asserted by
the card when it is selected and responding to
an I/O read cycle at the address that is on the
address bus. This signal is used by the host to
control the enable of any input data buffers
between the card and the CPU.
This signal is used for DMA data transfers
between host and device and is asserted by the
device when it is ready to transfer data to or
from the host. The direction of data transfer is
controlled by DIOR- and DIOW-. This signal is
used in a handshake manner with DMACK-
(i.e., the device waits until the host asserts
DMACK- before negating DMARQ, and
reasserting DMARQ if there is more data to
transfer).
This signal is not used in this mode.
This is an I/O read strobe generated by the
host. This signal gates I/O data onto the bus
from the card when the card is configured to
use the I/O interface.
This signal is not used in this mode.
Description
Interface Description
Rev. 12.0, 02/07