SDCFH-1024-388 SanDisk, SDCFH-1024-388 Datasheet - Page 25

COMPACT FLASH 1GB ULTRA II

SDCFH-1024-388

Manufacturer Part Number
SDCFH-1024-388
Description
COMPACT FLASH 1GB ULTRA II
Manufacturer
SanDisk
Datasheet

Specifications of SDCFH-1024-388

Memory Size
1GB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2007 SanDisk Corporation
SanDisk CompactFlash Card OEM Product Manual
Table 3-4
-DMACK
(True IDE Mode )
RESET
(PC Card Memory Mode)
(PC Card I/O Mode)
-RESET
(True IDE Mode)
V
(PC Card Memory Mode)
(PC Card I/O Mode )
(True IDE Mode )
-VS1
-VS2
(PC Card Memory Mode)
(PC Card I/O Mode )
(True IDE Mode )
-WAIT
(PC Card Memory Mode)
-WAIT
(PC Card I/O Mode )
IORDY
(True IDE Mode )
-WE
(PC Card Memory Mode)
-WE
(PC Card I/O Mode )
-WE
(True IDE Mode )
WP
(PC Card Memory Mode)
CC
Signal Name
Signal Description
Dir.
O
O
O
--
I
I
13, 38
33, 40
Pin
41
42
36
24
3-7
This signal is used by the host in response to
DMARQ to initiate DMA transfers.
NOTE: This signal may be negated by the host
to suspend the DMS transfer in process. For
Multiword DMA transfers, the device may
negate DMARQ with the t
the DMACK- is asserted and reasserted again
at a later time to resume DMA operation.
Alternatively, if the device is able to continue
the data transfer, the device may leave
DMARQ asserted and wait for the host to
reassert DMACK-.
When the pin is high, this signal resets the
card. The card is reset only at power-up if this
pin is left high or open from power-up. The card
is also reset when the Soft Reset bit in the Card
Configuration Option Register is set.
In the True IDE Mode this input pin is the active
low hardware reset from the host.
+5V, +3.3V power.
Voltage Sense Signals. -VS1 is grounded so
that the CompactFlash Card CIS can be read at
3.3 volts and VS2 is open and reserved by
PCMCIA for a secondary voltage.
SanDisk CompactFlash Memory cards do not
assert the -WAIT signal.
SanDisk CompactFlash Memory cards do not
assert the -WAIT signal.
SanDisk CompactFlash Memory cards, except
when in UDMA modes, do not assert an IORDY
signal.
This is a signal driven by the host and used for
strobing memory write data to the registers of
the card when it is configured in the Memory
Interface Mode. It is also used for writing the
configuration registers.
In PC Card I/O Mode, this signal is used for
writing the configuration registers.
In True IDE Mode this input signal is not used
and should be connected to VCC by the host.
Memory Mode–The CompactFlash Card does
not have a write-protect switch. This signal is
held low after the completion of the reset
initialization sequence.
Description
L
Interface Description
specified time once
Rev. 12.0, 02/07

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