MT18VDDT12872AG-335F1 Micron Technology Inc, MT18VDDT12872AG-335F1 Datasheet - Page 20
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MT18VDDT12872AG-335F1
Manufacturer Part Number
MT18VDDT12872AG-335F1
Description
MODULE DDR 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Specifications of MT18VDDT12872AG-335F1
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
333MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184UDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
1.62A
Number Of Elements
18
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
pdf: 09005aef80814e61, source: 09005aef80a43eed
DDA18C32_64_128x72AG.fm - Rev. E 9/04 EN
22. The valid data window is derived by achieving
23. Each byte lane has a corresponding DQS.
24. This limit is actually a nominal value and does not
25. To maintain a valid level, the transitioning edge of
26. CK and CK# input slew rate must be
27. DQ and DM input slew rates must not deviate
28. V
29. The clock is allowed up to ±150ps of jitter. Each
30.
Figure 7: Pull-Down Characteristics
controller greater than eight refresh cycles is not
allowed.
other specifications:
(
in direct porportion to the clock duty cycle and a
practical data valid window can be derived. The
clock is allowed a maximum duty cycle variation
of 45/55. Functionality is uncertain when operat-
ing beyond a 45/55 ratio.
result in a fail value. CKE is HIGH during
REFRESH command period (
CKE is LOW (i.e., during standby).
the input must:
ns differentially).
from DQS by more than 10 percent. DQ/DM/DQS
slew rates less than 0.5V/ns are not allowed. If slew
rate exceeds 4V/ns, functionality is uncertain.
not active while any bank is active.
timing parameter is allowed to vary by the same
amount.
t
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
HP min is the lesser of
a. Sustain a constant slew rate from the current
b. Reach at least the target AC level.
c. After the AC target level is reached, continue to
t
QH =
DD
AC level through to the target AC level, V
or V
maintain at least the target DC level, V
or V
must not vary more than 4 percent if CKE is
t
IH
IH
HP -
(AC).
(DC).
t
QHS). The data valid window derates
t
HP (
t
t
CK/2),
CL minimum and
t
RFC [MIN]) else
t
DQSQ, and
256MB, 512MB, 1GB (x72, ECC, DR), PC3200
1V/ns (2V/
IL
IL
(DC)
(AC)
t
t
QH
CH
20
31. READs and WRITEs with auto precharge are not
32. Any positive glitch must be less than 1/3 of the
33. Normal Output Drive Curves:
allowed to be issued until
fied prior to the internal precharge command
being issued.
clock and not more than +400mV or 2.9V, which-
ever is less. Any negative glitch must be less than 1/
3 of the clock cycle and not exceed either -300mV
or 2.4V, whichever is more positive. However, the
DC average cannot be below 2.5V minimum.
Figure 8: Pull-Up Characteristics
a. The full variation in driver pull-down current
b. The variation in driver pull-down current
c. The full variation in driver pull-up current
d. The variation in driver pull-up current within
e. The full variation in the ratio of the maximum
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 7,
Pull-Down Characteristics, on page 20.
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 7, Pull-Down Characteristics,
on page 20.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 8,
Pull-Up Characteristics, on page 20.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of
Figure 8, Pull-Up Characteristics, on page 20.
to minimum pull-up and pull-down current
should be between 0.71 and 1.4, for device
drain-to-source voltages from 0.1V to 1.0V, and
at the same voltage and temperature.
t
RAS(MIN) can be satis-
©2004 Micron Technology, Inc.