MT8VDDT6464HDG-335F2 Micron Technology Inc, MT8VDDT6464HDG-335F2 Datasheet - Page 20

• Manufacturer Part Number: MT8VDDT6464HDG-335F2
• Description: MODULE DDR 512MB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT6464HDG-335F2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 512Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 800mA
• Number Of Elements: 8
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

pdf: 09005aef80b575ca, source: 09005aef806e1d28
DDA8C32_64x64HDG.fm - Rev. D 9/04 EN
43. Random addressing changing and 100 percent of
44. CKE must be active (high) during the entire time a
45. I
46. Whenever the operating frequency is altered, not
data changing at every transfer.
refresh command is executed. That is, from the
time the AUTO REFRESH command is registered,
CKE must be active at each rising clock edge, until
t
driven to a valid high or low logic level. I
similar to I
address and control inputs to remain stable.
Although I
I
including jitter, the DLL is required to be reset.
This is followed by 200 clock cycles (before READ
commands).
REF later.
DD
DD
2N specifies the DQ, DQS, and DM to be
2
F
is “worst case.”
DD
DD
2
F
2
, I
F
DD
except I
2
N
, and I
DD
DD
2
Q
2
Q
specifies the
are similar,
DD
2
Q
is
20
256MB, 512MB (x64, DR) PC3200
47. Leakage number reflects the worst case leakage
48. When an input signal is HIGH or LOW, it is
49. This is the DC voltage supplied at the DRAM and
50. This is the DC voltage supplied at the DRAM and
possible through the module pin, not what each
memory device contributes.
defined as a steady state logic high or logic low.
is inclusive of all noise up to 20MHz. Any noise
above 20MHz at the DRAM generated from any
source other than that of the DRAM itself may not
exceed the DC voltage range of 2.6V ±100mV.
is inclusive of all noise up to 20MHz. Any noise
above 20MHz at the DRAM generated from any
source other than that of the DRAM itself may not
exceed the DC voltage range of 2.6V ±100mV.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
200-PIN DDR SODIMM
©2004 Micron Technology, Inc.