MT9VDDF6472G-40BF1 Micron Technology Inc, MT9VDDF6472G-40BF1 Datasheet - Page 14
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MT9VDDF6472G-40BF1
Manufacturer Part Number
MT9VDDF6472G-40BF1
Description
MODULE DDR SDRAM 512MB 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT9VDDF6472Y-40BF1.pdf
(30 pages)
Specifications of MT9VDDF6472G-40BF1
Memory Type
DDR SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MT9VDDF6472G-40BF3
MT9VDDF6472G-40BF3
MT9VDDF6472G-40BF3
Table 12: IDD Specifications and Conditions – 256MB
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–20; 0°C
pdf: 09005aef80f6ab6a, source: 09005aef80f6ab23
DDAF9C32_64x72G.fm - Rev. C 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge;
Burst = 4;
control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle;
Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock
cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank;
Active-Precharge;
inputs changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank
active; Address and control inputs changing once per clock cycle;
(MIN); I
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device
bank active; Address and control inputs changing once per clock cycle;
=
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL = 4) with
auto precharge,
inputs change only during Active READ, or WRITE commands
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
t
CK (MIN); DQ, DM and DQS inputs changing once per clock cyle;
IN
OUT
= V
t
RC =
= 0mA
REF
t
RC (MIN);
for DQ, DQS, and DM
t
RC =
t
RC =
t
t
CK =
CK =
t
RC (MIN);
t
RAS (MAX);
t
t
t
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
CK =
0.2V
t
CK (MIN); I
t
CK =
t
CK =
t
CK (MIN); Address and control
t
CK (MIN); DQ, DM andDQS
OUT
= 0mA; Address and
t
t
REFC =
REFC = 7.8125µs
256MB, 512MB (x72, ECC, SR) PC3200
t
RC =
t
14
CK =
T
A
t
t
RFC (MIN)
RC (MIN);
t
+70°C; V
t
CK =
CK MIN;
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
184-PIN DDR SDRAM RDIMM
CK
CK
DD
= V
I
SYM
I
I
I
I
I
I
DD4W
I
I
DD3N
I
DD5A
I
I
DD2P
DD2F
DD3P
DD4R
DD 0
DD1
DD5
DD6
DD7
DD
Q = +2.6V ±0.1V
MAX
1,215
1,530
1,800
1,755
2,340
4,230
-40B
540
360
630
36
54
36
©2004 Micron Technology, Inc. All rights reserved.
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 44
21, 28, 44
NOTES
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
45
41
20
9