MT18HTF6472Y-40EB2 Micron Technology Inc, MT18HTF6472Y-40EB2 Datasheet - Page 10
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MT18HTF6472Y-40EB2
Manufacturer Part Number
MT18HTF6472Y-40EB2
Description
MODULE SDRAM DDR2 512MB 240DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18HTF25672PY-667A1.pdf
(18 pages)
Specifications of MT18HTF6472Y-40EB2
Memory Type
DDR2 SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
64Mx72
Total Density
512MByte
Chip Density
256Mb
Access Time (max)
60ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
2.25A
Number Of Elements
18
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 12:
PDF: 09005aef80e5e752/Source: 09005aef80e5e626
HTF18C64_128_256x72.fm - Rev. E 3/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
valid commands; Address bus inputs are switching; Data bus inputs are
switching
Operating one bank active-read-precharge current: I
BL = 4, CL = CL (I
MIN (I
commands; Address bus inputs are switching; Data pattern is same as
I
Precharge power-down current: All device banks idle;
CKE is LOW; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching;
Data bus inputs are switching
Active power-down current: All device banks open;
t
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
valid commands; Other control and address bus inputs are switching;
Data bus inputs are switching
Operating burst write current: All device banks open; Continuous
burst writes; BL = 4, CL = CL (I
t
valid commands; Address bus inputs are switching; Data bus inputs are
switching
Operating burst read current: All device banks open; Continuous burst
reads; I
t
valid commands; Address bus inputs are switching; Data bus inputs are
switching
Burst refresh current:
t
Other control and address bus inputs are switching; Data bus inputs are
switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and
address bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads; I
t
HIGH, S# is HIGH between valid commands; Address bus inputs are stable
during deselects; Data bus inputs are switching
DD
RC =
CK =
RAS =
RAS =
RAS =
RFC (I
CK =
4W
t
t
t
DD
DD
RC (I
CK (I
CK (I
t
t
t
OUT
OUT
RAS MAX (I
RAS MAX (I
RAS MAX (I
),
) interval; CKE is HIGH, S# is HIGH between valid commands;
t
DD
DD
RCD =
DD
= 0mA; BL = 4, CL = CL (I
= 0mA; BL = 4, CL = CL (I
),
); CKE is LOW; Other control and address bus
DDR2 I
Values shown for MT47H256M4 DDR2 SDRAM only and are computed from values specified in the
1Gb (256 Meg x 4) component data sheet
),
t
t
RAS =
RC =
DD
t
RCD (I
), AL = 0;
DD
DD
DD
t
),
),
),
RC (I
DD
t
RAS MIN (I
t
t
t
RP =
RP =
RP =
t
DD
CK =
Specifications and Conditions (Die Revision A) – 2GB
DD
); CKE is HIGH, S# is HIGH between valid
t
),
CK =
t
t
t
DD
RP (I
RP (I
RP (I
t
t
CK (I
RRD =
), AL = 0;
DD
t
DD
DD
DD
CK (I
512MB, 1GB, 2GB (x72, ECC, SR) 240-Pin DDR2 SDRAM RDIMM
DD
DD
DD
); CKE is HIGH, S# is HIGH between
); CKE is HIGH, S# is HIGH between
); CKE is HIGH, S# is HIGH between
); CKE is HIGH, S# is HIGH between
t
), AL = 0;
); REFRESH command at every
), AL =
RRD (I
DD
t
),
CK =
t
DD
RC =
t
RCD (I
),
t
t
CK (I
CK =
t
RCD =
t
t
RC (I
CK =
t
DD
t
CK =
CK =
DD
t
CK (I
) - 1 x
DD
),
t
CK (I
t
RCD (I
t
),
t
t
OUT
CK (I
CK =
t
CK (I
DD
CK =
t
10
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
RAS =
t
DD
),
CK (I
= 0mA;
DD
DD
DD
t
),
CK (I
t
CK (I
),
); CKE is
); CKE is
DD
t
RAS
);
DD
DD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
);
);
Symbol
I
I
I
I
I
I
I
DD
DD
DD
DD
DD
I
I
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
2Q
2N
3N
2P
3P
4R
0
1
5
6
7
1,620
1,800
1,080
1,260
2,880
2,880
4,680
5,400
-667
126
990
720
180
126
©2003 Micron Technology, Inc. All rights reserved.
1,440
1,710
2,340
2,610
4,500
5,220
-53E
126
738
810
540
180
990
126
I
DD
Specifications
1,260
1,440
1,980
1,980
3,960
4,680
-40E
126
630
720
450
180
810
126
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA