MT18VDDF6472G-40BG3 Micron Technology Inc, MT18VDDF6472G-40BG3 Datasheet - Page 14
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MT18VDDF6472G-40BG3
Manufacturer Part Number
MT18VDDF6472G-40BG3
Description
MODULE SDRAM DDR 512MB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDDF12872Y-40BF1.pdf
(31 pages)
Specifications of MT18VDDF6472G-40BG3
Memory Type
DDR SDRAM
Memory Size
512MB
Speed
400MT/s
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 11: IDD Specifications and Conditions – 512MB
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 18–20; 0°C
pdf: 09005aef80f6b913, source: 09005aef80f6b41c
DDAF18C64_128x72G.fm - Rev. C 9/04 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge; Burst = 4;
t
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle;
Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle.
V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-
down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank;
Active-Precharge;
inputs changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank active;
Address and control inputs changing once per clock cycle;
I
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE
OPERATING CURRENT: Four device bank interleaving READs (BL = 4) with
auto precharge,
change only during Active READ, or WRITE commands
CK =
RC =
OUT
IN
= V
= 0mA
t
t
RC (MIN);
CK (MIN); DQ, DM and DQS inputs changing once per clock cyle;
REF
for DQ, DQS, and DM
t
CK =
t
t
CK =
RC =
t
t
RC =
CK (MIN); CKE = LOW
t
CK =
t
t
RC (MIN);
CK (MIN); I
t
RAS (MAX);
t
CK (MIN); CKE = (LOW)
0.2V
t
CK =
OUT
t
CK =
= 0mA; Address and control inputs
t
CK (MIN); Address and control inputs
t
CK (MIN); DQ, DM and DQS
t
t
REFC =
REFC = 7.8125µs
t
t
CK =
t
RC =
t
RFC (MIN)
14
CK =
T
512MB, 1GB (x72, ECC, SR) PC3200
A
t
t
CK (MIN);
+70°C; V
RC (MIN);
t
t
CK =
CK MIN;
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM RDIMM
t
CK
DD
= V
SYMBOL
DD
I
I
I
I
I
I
I
DD4W
I
I
I
DD3N
DD5A
I
I
DD2P
DD2F
DD3P
DD4R
DD
DD
DD1
DD6
DD7
Q = +2.6V ±0.1V
0
5
MAX
2,430
3,060
1,080
1,260
3,600
3,510
4,680
8,460
-40B
720
108
©2004 Micron Technology, Inc. All rights reserved.
72
72
UNITS
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 45
21, 28, 45
NOTES
20, 43
20, 43
20, 43
20, 45
24, 45
20, 44
46
42
20
9