MT9VDDT6472PHG-40BF2 Micron Technology Inc, MT9VDDT6472PHG-40BF2 Datasheet - Page 30

• Manufacturer Part Number: MT9VDDT6472PHG-40BF2
• Description: MODULE DDR SDRAM 512MB 200SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDT6472PHG-40BF2

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 400MT/s
• Package / Case: 200-SODIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 23: Serial Presence-Detect Matrix – 128MB, 256MB, 512MB (Continued)
“1”/”0”: Serial Data, “driven to HIGH”/”driven to LOW”
NOTE:
pdf: 09005aef808ffe58, source: 09005aef808ffdc7
DD9C16_32_64_128x72PHG.fm - Rev. B 9/04 EN
99-127 Manufacturer-Specific Data ( RSVD)
48–61 Reserved
BYTE
36-40 Reserved
65-71 Manufacturer’s JEDEC ID Code
73-90 Module Part Number (ASCII)
95-98 Module Serial Number
1. Device latencies used for SPD values.
2. Value for -262/-26A
3. The value of
4. The JEDEC SPD specification allows fast or slow slew rate values for these bytes. The worst-case (slow slew rate) value is
5. The value of
32
33
34
35
41
42
43
44
45
46
47
62
63
64
72
91
92
93
94
represented here. Systems requiring the fast slew rate setup and hold values are supported, provided the faster mini-
mum slew rate is met.
SDRAM device specification is 15ns.
Address and Command Setup Time,
(see note 4)
Address and Command Hold Time,
(see note 4)
Data/Data Mask Input Setup Time,
Data/ Data Mask Input Hold Time,
Min Active Refresh Time
Minimum Auto Refresh to Active/Auto
Refresh Command Period,
SDRAM Device Max Cycle Time,
SDRAM Device Max DQS–DQ Skew
Time,
SDRAM Device Max Read Data Hold
Skew Factor
Reserved
DIMM Height
SPD Revision
Checksum For Bytes 0–62
Manufacturer’s JEDEC ID Code
(continued)
Manufacturing Location
PCB Identification Code
Identification Code (Continued)
Year Of Manufacture in BCD
Week Of Manufacture in BCD
t
DQSQ
t
t
RAS used for -265 modules is calculated from
RP,
DESCRIPTION
t
RCD, and
t
CK set to 7ns (0x70) for optimum BIOS compatibility. Actual device spec. value is 7.5ns.
t
RAP for -335 modules indicated as 18ns to align with industry specifications; actual DDR
t
RC
t
RFC
t
128MB, 256MB, 512MB, 1GB (x72, ECC, PLL, SR)
CK
t
t
t
MAX
DH
DS
IH
t
IS
13ns (-262/-26A/-265)
75ns (-262/-26A/-265)
1.0ns (-262/-26A/-265)
1.0ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.5ns (-262/-26A/-265)
0.75ns (-262/-26A/-265)
ENTRY(VERSION)
65ns (-26A/-265)
60ns (-335/-262)
0.45ns (-335)
0.55ns (-335)
0.45ns (-335
0.45ns (-335
Revision 1.0
0.8ns (-335)
0.8ns (-335)
72ns (-335)
12ns (-335)
MICRON
01–12
-26A
-335
-262
-265
1–9
0
30
t
RC -
t
RP. Actual device spec value is 40ns.
200-PIN DDR SDRAM SODIMM
MT9VDDT1672PH MT9VDDT3272PH MT9VDDT6472PH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Variable Data
Variable Data
Variable Data
Variable Data
01–0C
01–09
A0
A0
2D
1A
ED
1A
4A
80
80
45
50
45
50
00
3C
41
48
4B
30
34
32
55
75
00
01
00
10
2C
00
00
–
Variable Data
Variable Data
Variable Data
Variable Data
01–0C
01–09
A0
A0
2D
3D
D0
2D
3C
4B
FD
2C
80
80
45
50
45
50
00
41
48
30
34
32
55
75
00
01
00
10
00
00
©2004 Micron Technology, Inc. All rights reserved.
–
Variable Data
Variable Data
Variable Data
Variable Data
ADVANCE
01–0C
01–09
A0
A0
2D
80
80
45
50
45
50
00
3C
41
48
4B
30
34
32
55
75
00
01
00
10
7E
11
3E
6E
2C
00
00
–