MT36HTS51272FY-53EA3D3 Micron Technology Inc, MT36HTS51272FY-53EA3D3 Datasheet - Page 25

• Manufacturer Part Number: MT36HTS51272FY-53EA3D3
• Description: MODULE DDR2 4GB 240FBDIMM
• Manufacturer: Micron Technology Inc

Specifications of MT36HTS51272FY-53EA3D3

• Memory Type: DDR2 SDRAM
• Memory Size: 4GB
• Speed: 533MT/s
• Package / Case: 240-FBDIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 13:
PDF: 09005aef822148b0/source: 09005aef82214898
HTS36C512x72F_2.fm - Rev. A 4/06 EN
Parameter
Differential peak-to-peak input voltage
for large voltage swing
MAX single-ended voltage in EI condition
MAX single-ended voltage in EI condition
(DC only)
MAX peak-to-peak differential voltage in
EI condition
Single-ended voltage (referencing V
D+/D–
Single-pulse peak differential input
voltage
Amplitude ratio between adjacent
symbols
MAX RX inherent timing error, 3.2 and 4.0
Gb/s
MAX RX inherent deterministic timing
error, 3.2 and 4.8 Gb/s
Single-pulse width as zero-voltage
crossing
Single pulse width at MIN-level crossing
Differential RX input rise/fall time
Common mode input voltage
Differential RX output rise/fall time
Common mode of input voltage
AC peak-to-peak common mode of input
voltage
Ratio of V
Differential return loss
Common mode return loss
RX termination impedance
D+/D– RX Impedance difference
Lane-to-lane PCB skew at RX
MIN RX drift tolerance
MIN data tracking 3dB bandwidth
EI entry detect time
EI exit detect time
Bit error ratio
RX
-
CM
Differential Receiver Input Specifications
-
AC
p-p
Notes:
to MIN V
2. Single-ended voltages below that value that are simultaneously detected on D+ and D- are
3. Multiple lanes need to detect the EI condition before the device can act upon the EI detec-
4. Specified at the package pins into a timing and voltage compliance test setup.
1. Specified at the package pins into a timing and voltage compliant test setup. Note that sig-
RX
-
nal levels at the pad will be lower than at the pin.
interpreted as the EI condition. Worst-case margins are determined for the case with trans-
mitter using small voltage swing.
tion.
DIFF
p-p
SS
) on
V
T
V
V
T
RX
RX
L
T
V
V
T
V
V
R
RX
EI
RX
V
RX
R
EI
V
T
Symbol
RX
RX
RX
RX
-
RX
T
-
V
T
-
RL
T
-
RL
ENTRY
DIFF
X
-
RX
-
RX
RISE
RX
RX
V
CM
RX
EXIT
IDLE
V
-
RX
-
-PCB-
RX
-
-
-
-
Differential Transmitter and Receiver Specifications
TJ
MATCH
BER
IDLE
DIFF
DJ
CM
R
F
RX
-
-
RX
-
RX
-
-
RX
DIFF
TJ
-
-
-
-
TRK
IDLE
-
PW
PW
RX
MAX
DJ
-
EH
DRIFT
ADJ
T
-
-
-
-
DD
-
-
-
-
DETECT
DIFF
CM
-
-
MAX
AC
DIFF
-
SE
RX
CM
-
DETECT
PULSE
-
-
SE
-
p-p
SKEW
DD
ML
RATOP
-
ZC
-4.8
-
SE
p-p
-
-
RATIO
4.8
-
240-Pin 4GB DDR2 SDRAM FBDIMM (DR, FB, x72)
FALL
DC
p-p
DC
25
–300
Min
0.55
170
120
400
0.2
0.2
85
50
41
9
6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
10
Max
TBD
TBD
TBD
TBD
900
400
270
0.4
0.3
75
50
65
45
55
60
30
4
6
–
–
–
–
–
–
–
–
-12
Unit
MHz
mV
mV
mV
mV
mV
mV
mV
mV
dB
dB
UI
UI
UI
UI
UI
UI
ps
%
%
UI
ps
ns
ns
Ω
–
–
Meas. 0.1–2.4 GHz, Note 12
Meas. 0.1–2.4 GHz, Note 12
©2006 Micron Technology, Inc. All rights reserved.
Lane-to-lane skew at the
receiver that must be
Comments, Notes
tolerated, Note 14
20–80% voltage
EQ 6, Note 1, 10
Note 4, 7, 8, 9
Note 4, 7, 8, 9
EQ 5, Note 1
EQ 7, Note 1
Note 4, 7, 8
Note 4, 7, 8
Note 2, 3
Note 2, 3
Note 4, 5
Note 4, 6
Note 4, 5
Note 4, 5
Note 13
Note 15
Note 16
Note 17
Note 18
Note 3
Note 4
EQ 8
11
Preliminary