MT8JTF12864AY-1G4D1 Micron Technology Inc, MT8JTF12864AY-1G4D1 Datasheet
MT8JTF12864AY-1G4D1
Specifications of MT8JTF12864AY-1G4D1
Related parts for MT8JTF12864AY-1G4D1
MT8JTF12864AY-1G4D1 Summary of contents
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DDR3 SDRAM UDIMM MT8JTF12864A – 1GB MT8JTF25664A – 2GB For component data sheets, refer to Micron’s Web site: Features • DDR3 functionality and operations supported as defined in the component data sheet • 240-pin, unbuffered dual in-line memory module (UDIMM) ...
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... Data sheets for the base device parts can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT8JTF12864AY-1G1D1. PDF: 09005aef82b21119/Source: 09005aef82b2112c JTF8c128_256x64AY.fm - Rev. B 6/08 EN ...
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Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin DDR3 UDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin DQ25 61 REF ...
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Table 6: Pin Descriptions Symbol Type Description A[14:0] Input Address inputs: Provide the row address for ACTIVATE commands, and the column address and auto precharge bit for READ/WRITE commands, to select one location out of the memory array in the ...
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Functional Block Diagram Figure 2: Functional Block Diagram S0# DQS0# DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 V DQS1# SS DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 V SS DQS2# DQS2 DM2 DQ16 DQ17 ...
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... WRITEs. The read data is transmitted by the DDR3 SDRAM and edge-aligned to the data strobes. DDR3 SDRAM modules operate from a differential clock (CK and CK#); the crossing of CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. Control, command, and address signals are registered at every positive edge of CK. Input data is registered on both edges of DQS, and output data is referenced to both edges of DQS, as well as to both edges of CK ...
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Electrical Specifications Stresses greater than those listed in Table 7, may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each ...
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... Design Considerations Simulations Micron memory modules are designed to optimize signal integrity through carefully designed terminations, controlled board impedances, routing topologies, trace length matching, and decoupling. However, good signal integrity starts at the system level. Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system ...
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I Specifications DD Table 10: DDR3 I Specifications and Conditions – 1GB DD Values are for the MT41J128M8 DDR3 SDRAM only and are computed from values specified in the 1Gb (128 Meg x 8) component data sheet Parameter Operating current ...
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Serial Presence-Detect Table 12: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input ...
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Module Dimensions Figure 3: 240-Pin DDR3 UDIMM 0.75 (0.03) R (8X 2.50 (0.098) D (2X) 2.30 (0.091) TYP Pin 1 2.20 (0.087) TYP 1.45 (0.057) TYP 54.68 (2.15) TYP 3.05 (0.12) TYP Pin 240 Notes: 1. All dimensions ...