LTM4612MPV#PBF Linear Technology, LTM4612MPV#PBF Datasheet - Page 18

• Manufacturer Part Number: LTM4612MPV#PBF
• Description: IC BUCK SYNC ADJ 5A 133LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4612MPV#PBF

• Design Resources: LTM4612 Spice Model
• Output: 3.3 ~ 15 V
• Number Of Outputs: 1
• Power (watts): 75W
• Mounting Type: Surface Mount
• Voltage - Input: 5 ~ 36 V
• Package / Case: 133-LGA
• 1st Output: 3.3 ~ 15 VDC @ 5A
• Size / Dimension: 0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
• Power (watts) - Rated: 75W
• Operating Temperature: -55°C ~ 125°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

LTM4612
Table 4. 5V Output
DERATING CURVE
Figures 18, 21
Figures 18, 21
Figures 18, 21
Figures 10, 13, 16
Figures 10, 13, 16
Figures 10, 13, 16
Heat Sink Manufacturer
Wakefield Engineering
Safety Considerations
The LTM4612 modules do not provide isolation from V
to V
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic
failure.
Layout Checklist/Example
The high integration of LTM4612 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid-
erations are still necessary.
• Use large PCB copper areas for high current path, in-
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• Use round corners for the PCB copper layer to minimize
• To minimize the EMI noise and reduce module thermal

applicaTions inForMaTion
cluding V
PCB conduction loss and thermal stress.
tors next to the V
high frequency noise.
unit.
the radiated noise.
stress, use multiple vias for interconnection between
top layer and other power layers.
OUT
. There is no internal fuse. If required, a slow blow
IN
, PGND and V
D
, PGND and V
V
IN
OUT
36
36
36
36
36
36
(V)
. It helps to minimize the
OUT
Part No: LTN20069
pins to minimize
POWER LOSS CURVE
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
Figure 10
IN
• Do not put vias directly on pads.
• If vias are placed onto the pads, the the vias must be
• Interstitial via placement can also be used if necessary.
• Use a separated SGND ground copper area for com-
• Place one or more high frequency ceramic capacitors
Figure 17 gives a good example of the recommended
layout.
AIR FLOW (LFM)
capped.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
close to the connection into the system board.
V
GND
V
OUT
IN
200
400
200
400
C
0
0
OUT
C
IN
Figure 17. Recommended PCB Layout
C
OUT
C
IN
Phone: [phone]
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
HEAT SINK
None
None
None
θ
JA
14.9
11.1
10.4
4612 F17
9.3
(°C/W)
10
14
SIGNAL
GND
4612fa