PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 320
![MODULE PROC PIC18F8680,6680,8565](/photos/8/96/89669/pcm18xk1_sml.jpg)
PCM18XK1
Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet
1.PCM18XK1.pdf
(496 pages)
Specifications of PCM18XK1
Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F6585/8585/6680/8680
23.2.5
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 23-55: CIOCON: CAN I/O CONTROL REGISTER
DS30491C-page 318
bit 7
bit 6
bit 5
bit 4
bit 3-0
CAN MODULE I/O CONTROL
REGISTER
bit 7
TX2SRC: CANTX2 Pin Data Source bit
1 = CANTX2 pin will output the CAN clock
0 = CANTX2 pin will output CANTX1
TX2EN: CANTX2 Pin Enable bit
1 = CANTX2 pin will output CANTX1 or CAN clock as selected by TX2SRC bit
0 = CANTX2 pin will have digital I/O function
ENDRHI: Enable Drive High bit
1 = CANTX pin will drive V
0 = CANTX pin will be tri-state when recessive
CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture, CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture, RC2/CCP1 input to CCP1 module
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
- n = Value at POR
TX2SRC
R/W-0
Note 1: Always set this bit when using differential bus to avoid signal crosstalk in CANTX
from other nearby pins.
TX2EN
R/W-0
ENDRHI
W = Writable bit
‘1’ = Bit is set
R/W-0
DD
when recessive
(1)
CANCAP
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
U-0
—
2004 Microchip Technology Inc.
x = Bit is unknown
U-0
—
U-0
—
bit 0
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