PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 444

MODULE PROC PIC18F8680,6680,8565

PCM18XK1

Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XK1

Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F6585/8585/6680/8680
TABLE 27-20: I
DS30491C-page 442
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1:
Param.
No.
2:
T
T
T
T
T
T
T
T
T
T
T
C
Symbol
SU
SU
SU
AA
R
HIGH
LOW
F
HD
HD
BUF
B
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
A Fast mode I
T
low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output
the next data bit to the SDA line.
T
the SCL line is released.
SU
R
:
:
:
:
:
STA
DAT
STO
STA
DAT
max. + T
:
DAT
2
C BUS DATA REQUIREMENTS (SLAVE MODE)
Clock High Time
Clock Low Time
SDA and SCL Rise
Time
SDA and SCL Fall
Time
Start Condition
Setup Time
Start Condition
Hold Time
Data Input Hold
Time
Data Input Setup
Time
Stop Condition
Setup Time
Output Valid from
Clock
Bus Free Time
Bus Capacitive Loading
250 ns, must then be met. This will automatically be the case if the device does not stretch the
SU
2
:
DAT
C bus device can be used in a Standard mode I
= 1000 + 250 = 1250 ns (according to the Standard mode I
Characteristic
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
20 + 0.1 C
20 + 0.1 C
1.5 T
1.5 T
Min
250
100
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
1.3
4.7
0
0
CY
CY
B
B
2
1000
3500
Max
300
300
300
C bus system but the requirement,
0.9
400
Units
ns
ns
ns
pF
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
 2004 Microchip Technology Inc.
2
PIC18FXX8X must operate
at a minimum of 1.5 MHz
PIC18FXX8X must operate
at a minimum of 10 MHz
PIC18FXX8X must operate
at a minimum of 1.5 MHz
PIC18FXX8X must operate
at a minimum of 10 MHz
C
10 to 400 pF
C
10 to 400 pF
Only relevant for Repeated
Start condition
After this period, the first
clock pulse is generated
(Note 2)
(Note 1)
Time the bus must be free
before a new transmission
can Start
C bus specification) before
B
B
is specified to be from
is specified to be from
Conditions

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