LFM34INTPU1A Freescale Semiconductor, LFM34INTPU1A Datasheet - Page 40

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LFM34INTPU1A

Manufacturer Part Number
LFM34INTPU1A
Description
ADAPTER MPC5534 324-BGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of LFM34INTPU1A

Module/board Type
Adapter Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
-
Electrical Characteristics
40
1
2
3
4
5
6
7
Spec
10
11
12
All DSPI timing specifications use the fastest slew rate (SRC = 0b11) on pad type M or MH. DSPI signals using pad types of
S or SH have an additional delay based on the slew rate. DSPI timing is specified at V
CL = 50 pF with SRC = 0b11.
The minimum SCK cycle time restricts the baud rate selection for the given system clock rate.
These numbers are calculated based on two MPC55xx devices communicating over a DSPI link.
The actual minimum SCK cycle time is limited by pad performance.
The maximum value is programmable in DSPI_CTARx[PSSCK] and DSPI_CTARx[CSSCK].
The maximum value is programmable in DSPI_CTARx[PASC] and DSPI_CTARx[ASC].
This number is calculated using the SMPL_PT field in DSPI_MCR set to 0b10.
8
9
Speed is the nominal maximum frequency. Max speed is the maximum speed allowed including frequency modulation (FM).
42 MHz parts allow for 40 MHz system clock + 2% FM; 68 MHz parts allow for a 66 MHz system clock + 2% FM, and
82 MHz parts allow for 80 MHz system clock + 2% FM.
PCSS to PCSx time
Data setup time for inputs
Data hold time for inputs
Data valid (after SCK edge)
Data hold time for outputs
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
Characteristic
MPC5534 Microcontroller Data Sheet, Rev. 5
Table 26. DSPI Timing
7
7
Symbol
t
t
PASC
t
SUO
t
SUI
t
HO
HI
Min.
5.5
20
–4
20
–4
45
–4
–5
–5
5
2
7
8
40 MHz
Max
25
45
1, 2
5
5
(continued)
Min.
5.5
20
20
–4
25
–4
–5
–5
5
2
6
7
4
66 MHz
DDEH
Max
25
25
5
5
= 3.0–5.25 V, T
Min.
Freescale Semiconductor
5.5
20
20
–4
21
–4
–5
–5
5
2
8
7
3
80 MHz
A
= T
Max
25
21
5
5
L
to T
H
, and
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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