ADV212-HD-EB Analog Devices Inc, ADV212-HD-EB Datasheet - Page 14

BOARD EVALUATION FOR ADV212-HD

ADV212-HD-EB

Manufacturer Part Number
ADV212-HD-EB
Description
BOARD EVALUATION FOR ADV212-HD
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV212-HD-EB

Main Purpose
Video, Video Processing
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADV212-HD
Primary Attributes
1080i and 720p SDI Compatible, 32/64-bit, 33/66 MHz PCI Card
Secondary Attributes
GUI, JPEG2000 Video Codec
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ADV212
STREAMING MODE (JDATA)—FIFO READ/WRITE
Table 10.
Parameter
MCLK to JDATA Valid
MCLK to VALID Assert/Deassert
HOLD Setup to Rising MCLK
HOLD Hold from Rising MCLK
JDATA Setup to Rising MCLK
JDATA Hold from Rising MCLK
1
For a definition of JCLK, see Figure 32.
JDATA
JDATA
VALID
VALID
MCLK
MCLK
HOLD
HOLD
JDATA
VALID
TD
SU
JDATA
VALID
JDATA
TD
TD
HD
Figure 19. Streaming Mode Timing—Encode Mode JDATA Output
Figure 20. Streaming Mode Timing—Decode Mode JDATA Input
JDATA
JDATA
Mnemonic
JDATA
VALID
HOLD
HOLD
JDATA
JDATA
HD
SU
HOLD
HOLD
TD
SU
HD
TD
SU
HD
Rev. B | Page 14 of 44
SU
SU
HOLD
Min
1.5 JCLK
1.5 JCLK
3
3
3
3
HD
1
1
HOLD
HD
Typ
Max
2.5 × JCLK + 9.5
2.5 × JCLK + 8.0
1
1
Unit
ns
ns
ns
ns
ns
ns

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