SI3230PPQX-EVB Silicon Laboratories Inc, SI3230PPQX-EVB Datasheet - Page 21
SI3230PPQX-EVB
Manufacturer Part Number
SI3230PPQX-EVB
Description
BOARD EVAL W/DISCRETE INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet
1.SI3230-E-FT.pdf
(108 pages)
Specifications of SI3230PPQX-EVB
Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3230
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Power Alarm Threshold, Q1 & Q2
Power Alarm Threshold, Q3 & Q4
Power Alarm Threshold, Q5 & Q6
*Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
Power Alarm Interrupt Pending
Power Alarm Interrupt Enable
Thermal LPF Pole, Q1 & Q2
Thermal LPF Pole, Q3 & Q4
Thermal LPF Pole, Q5 & Q6
Line Power Monitor Output
Automatic/Manual Detect
Power Monitor Pointer
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
Power Alarm
Parameter
Table 22. Associated Power Monitoring and Power Fault Registers
1 = enter open state
spond to Q1 to Q6,
spond to Q1 to Q6,
to Q6, respectively
0 to 5 points to Q1
upon power alarm
0 to 7.8 W for Q1,
0 to 0.9 W for Q3,
0 = manual mode
Bits 2 to 7 corre-
Bits 2 to 7 corre-
Description/
respectively
respectively
Q2, Q5, Q6
0 to 7.8 W
0 to 0.9 W
0 to 7.8 W
Range
see equation above
see equation above
see equation above
Q4
Preliminary Rev. 0.96
Resolution
30.4 mW
3.62 mW
30.4 mW
3.62 mW
30.4 mW
n/a
n/a
n/a
n/a
where n = 1 to 6
where n = 1 to 6
PWRMP[2:0]
PWROM[7:0]
QnAP[n+1],
QnAE[n+1],
PPT12[7:0]
PPT34[7:0]
PPT56[7:0]
NQ12[7:0]
NQ34[7:0]
NQ56[7:0]
Register
AOPN
Bits
Indirect Register 32
Indirect Register 33
Indirect Register 34
Indirect Register 37
Indirect Register 38
Indirect Register 39
Direct Register 76
Direct Register 77
Direct Register 19
Direct Register 22
Direct Register 67
Si3230
Location*
21
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