MAX11068EVKIT+ Maxim Integrated Products, MAX11068EVKIT+ Datasheet - Page 26

• Manufacturer Part Number: MAX11068EVKIT+
• Description: KIT SMART BATT MEASUREMENT 12CH
• Manufacturer: Maxim Integrated Products

Specifications of MAX11068EVKIT+

• Main Purpose: Power Management, Battery Monitor, Car
• Utilized Ic / Part: MAX11068
• Primary Attributes: Monitors Current, Voltage, Temperature
• Secondary Attributes: 1 ~ 12 Cell- Li-Ion, 1 ~ 12 Cell- NiMH
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -

12-Channel, High-Voltage Sensor, Smart
Data-Acquisition Interface
Figure 17. External Cell-Balancing Circuit with a MOSFET
Transistor
The MAX11068 implements a watchdog-style timeout
feature for the cell-balancing switch enables. A count-
down timer is clocked at a rate specified by a predivider.
The full range of possible timeout values is 0 to 240s. In
the event of unexepected communication loss, the cell-
balancing switches are safely disabled after the timer
reaches zero. The timeout disables the cell switches with
a signal separate from those of the BALCFG register.
Thus, the BALCFG register value is not affected by the
cell-balancing timeout condition. Figure 18 shows the
timeout circuit block diagram.
The cell-balancing timeout feature consists of a 4-bit
countdown timer and a predivider with 2 control bits
for range selection. Both the timer and predivider are
programmed through the MSB of the ACQCFG register
(address 0x0C). The predivider sets the effective LSB
time period of the timer. The user-selectable choices are
shown in Table 2.
The cell-balancing timer counts down at the rate speci-
fied by the predivider, CBPDIV[1:0]. The timer starts
when the CBPDIV control bits are written to one of the
three enabled settings. The CBTIMER[3:0] bits are read-
able and writeable and return the value of the timer as
sampled during the acknowledge bit time of the register
address bit of the READALL command. The host appli-
cation should periodically rewrite the ACQCFF register
value to ensure that this value does not unintentionally
go to zero. The timeout can be set to any value within the
timer range specified by the CBPDIV setting by choos-
ing the appropriate value to write to the CBTIMER byte.
If the value of the CBTIMER does reach zero, the cell-
balancing switches are disabled until the timer is either
disabled or is refreshed by writing a nonzero value. If
26
F1
F2
R
EQ
D
CLAMP
R
BIAS1
Watchdog Timeout
R
R
GATE
BIAS2
Cell-Balancing
C
F
C
C
N+1
N
Figure 18. Cell-Balancing Timer Block Diagram
Table 2. Cell-Balancing Predivider
Settings
the timer is enabled by writing the CBPDIV bits while the
CBTIMER value is at 00h, the cell-balancing switches
are not disabled. The first transition of CBTIMER to the
00h value when the timer is enabled disables the bal-
ancing switches.
The MAX11068 incorporates a linear regulator for gen-
erating the internal supply from DCIN. The regulator
can accept a supply voltage on the DCIN pin from 6.0V
to +70V, which it regulates to 3.3V to run the voltage-
measurement system, control logic, and low-side com-
munication interface. The regulator is designed to sup-
ply up to 10mA of current. When the SHDN pin and die
temperature protection are not active and a sufficient
voltage is applied to DCIN, the output of the regulator
becomes active. The regulator is paired with a power-
on POR circuit that senses its output voltage and holds
the MAX11068 in a reset state until the internal supply
has reached a sustainable threshold of +3.0V (Q5%).
The internal comparator has built-in hysteresis that can
handle noise on the supply line, as well as slow sup-
ply ramps of 1V/s. Since secondary metal batteries are
never fully discharged to 0V, the MAX11068 is designed
32.768kHz
CBPDIV[1:0]
SETTING
CBPDIV1 CBPDIV0
00
01
10
11
CBPDIV
CBTIMER
ENABLE
Timer disabled
BIT 3
Internal Regulator and
TIMER LSB
PERIOD (s)
BIT 2 BIT 1 BIT 0
CBTIMER
16
1
4
BALCFG [bit n]
ZERO
FLAG
Charge Pump
(MIN TO MAX) (s)
TIMER RANGE
Timer disabled
16 to 240
1 to 15
4 to 60
BALANCING
SWITCH [n]
ENABLE
CELL-