DS26524DK Maxim Integrated Products, DS26524DK Datasheet - Page 19
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DS26524DK
Manufacturer Part Number
DS26524DK
Description
KIT DESIGN FOR DS26524
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26524G.pdf
(273 pages)
Specifications of DS26524DK
Main Purpose
Telecom, Framer and Line Interface Units (LIUs)
Utilized Ic / Part
DS26524
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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7.
7.1
Table 7-1. Detailed Pin Descriptions
TXENABLE
RRING1
RRING2
RRING3
RRING4
TRING1
TRING2
TRING3
TRING4
TSER1
TSER2
TSER3
TSER4
NAME
RTIP1
RTIP2
RTIP3
RTIP4
TTIP1
TTIP2
TTIP3
TTIP4
Pin Functional Description
PIN DESCRIPTIONS
H1, H2
G3, H3
A1, A2
A3, B3
R3, T3
T1, T2
J3, K3
J1 J2
PIN
L13
C1
C2
R4
N7
F1
P1
F2
P2
F6
E7
L1
L2
Impedance
Impedance
Analog
Analog
Output,
Output,
TYPE
Analog
Analog
Input
Input
High
High
I
I
Receive Bipolar Tip for Transceiver 1 to 4. The differential inputs of RTIPn and
RRINGn can provide internal matched impedance for E1 75Ω, E1 120Ω, T1 100Ω,
or J1 110Ω. The user has the option of turning off internal termination via the LIU
Receive Impedance and Sensitivity Monitor register (LRISMR).
Receive Bipolar Ring for Transceiver 1 to 4. The differential inputs of RTIPn and
RRINGn can provide internal matched impedance for E1 75Ω, E1 120Ω, T1 100Ω,
or J1 110Ω. The user has the option of turning off internal termination via the LIU
Receive Impedance and Sensitivity Monitor register (LRISMR).
Transmit NRZ Serial Data. These pins are sampled on the falling edge of TCLK
when the transmit-side elastic store is disabled. These pins are sampled on the
falling edge of TSYSCLK when the transmit-side elastic store is enabled.
In IBO mode, data for multiple framers can be used in high-speed multiplexed
scheme. This is described in Section 8.8.2. The table there presents the
combination of framer data for each of the streams.
TSYSCLK is used as a reference when IBO is invoked.
Transmit Bipolar Tip for Transceiver 1 to 4. These pins are differential line
driver tip outputs. These pins can be high impedance if:
If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if
TXENABLE is low, the register settings for control of the TTIP/TRING are ignored
and output is high impedance.
The differential outputs of TTIPn and TRINGn can provide internal matched
impedance for E1 75Ω , E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option
of turning off internal termination.
Note: The two pins shown for each transmit bipolar tip (e.g., pins A1 and A2 for
TTIP1) should be tied together.
Transmit Bipolar Ring for Transceiver 1 to 4. These pins are differential line
driver ring outputs. These pins can be high impedance if:
If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if
TXENABLE is low, the register settings for control of the TTIP/TRING are ignored
and output is high impedance.
The differential outputs of TTIPn and TRINGn can provide internal matched
impedance for E1 75Ω, E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option
of turning off internal termination.
Note: The two pins shown for each transmit bipolar ring (e.g., pins A3 and B3 for
TRING1) should be tied together.
Transmit Enable. If this pin is pulled low, all transmitter outputs (TTIP and
TRING) are high impedance. The register settings for tri-state control of
TTIP/TRING are ignored if TXENABLE is low. If TXENABLE is high, the particular
driver can be tri-stated by the register settings.
ANALOG TRANSMIT
TRANSMIT FRAMER
ANALOG RECEIVE
19 of 273
FUNCTION
DS26524 Quad T1/E1/J1 Transceiver
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