DS26524DK Maxim Integrated Products, DS26524DK Datasheet - Page 249
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DS26524DK
Manufacturer Part Number
DS26524DK
Description
KIT DESIGN FOR DS26524
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26524G.pdf
(273 pages)
Specifications of DS26524DK
Main Purpose
Telecom, Framer and Line Interface Units (LIUs)
Utilized Ic / Part
DS26524
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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11.1
Table 11-4. Thermal Characteristics
Note 1:
Note 2:
11.2
Table 11-5. Transmitter Characteristics
Output Mark Amplitude
Output Zero Amplitude
Transmit Amplitude Variation with
Supply
Table 11-6. Receiver Characteristics
Cable Attenuation
Allowable Zeros Before Loss
(Note 1)
Allowable Ones Before Loss
(Note 2)
Note 1:
Note 2:
Ambient Temperature (Note 1)
Junction Temperature
Theta-JA (θ
Thermal Characteristics
Line Interface Characteristics
The package is mounted on a four-layer JEDEC standard test board.
Theta-JA (θ
board.
192 zeros for T1 and T1.231 Specification Compliance. 192 zeros for E1 and G.775 Specification Compliance. 2048 zeros for
ETS 300 233 compliance.
24 ones in 192-bit period for T1.231; 192 ones for G.775; 192 ones for ETS 300 233.
PARAMETER
PARAMETER
JA
) in Still Air for 256-Pin TE-CSBGA
PARAMETER
JA
) is the junction-to-ambient thermal resistance, when the package is mounted on a four-layer JEDEC standard test
SYMBOL
SYMBOL
Attn
V
V
m
s
249 of 273
E1 75Ω
E1 120Ω
T1 100Ω
J1 110Ω
(Note 1)
DS26524G
DS26524GN
(Note 2)
CONDITIONS
CONDITIONS
CONDITIONS
2.13
2.70
2.40
2.40
MIN
MIN
MIN
-0.3
-40
DS26524 Quad T1/E1/J1 Transceiver
-1
0
+17.5
2048
TYP
TYP
2.37
3.00
3.00
3.00
TYP
192
192
192
192
24
+125
MAX
MAX
MAX
2.61
3.30
3.60
3.60
+0.3
+70
+85
+1
43
UNITS
UNITS
UNITS
°C/W
dB
°C
°C
%
V
V
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