CDB5581 Cirrus Logic Inc, CDB5581 Datasheet
CDB5581
Specifications of CDB5581
Related parts for CDB5581
CDB5581 Summary of contents
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... Evaluation Board General Description The CDB5581 is a versatile tool designed for evaluating the func- tionality and performance of the CS5581 ADC (Analog-to-Digital Converter). The SPI serial port on the CDB5581 evaluation board is configured in Master mode and will start transmitting data after power-up upon reset ...
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... A.2 Hardware Considerations .................................................................................................. 9 APPENDIX B. BILL OF MATERIALS ........................................................................................ 10 APPENDIX C. SCHEMATICS ..................................................................................................... 11 APPENDIX D. LAYER PLOTS ................................................................................................... 16 APPENDIX E. CALIBRATION FUNCTION ................................................................................. 25 APPENDIX E. REVISION HISTORY .......................................................................................... 26 Figure 1. CDB5581 Block Diagram ................................................................................................. 4 Figure 2. CDB5581 Board Layout ................................................................................................... 5 Figure 3. Schematic - Block Diagram............................................................................................ 11 Figure 4. Schematic - Power Supplies .......................................................................................... 12 Figure 5. Schematic - Input Buffers and Multiplexer ..................................................................... 13 Figure 6. Schematic - CS5581 ...................................................................................................... 14 Figure 7. Schematic - Configuration & ...
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... CS5581. Interfacing the CDB5581 evaluation board to a user-supplied data capture system can be as sim- ple as connecting the SPI port and using the CDB5581 default hardware configuration. In this configura- tion, simply press the Reset switch on the CDB5581 and it will automatically begin transmitting data to the data capture system. ...
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... Overview The CDB5581 evaluation board has both analog and digital circuit sections. The analog section consists of the CS5581 ADC, two analog input signal buffers, controlled through a multiplexer, that condition the signal into the ADC, and a precision 4.096 V reference. The digital section consists of board operation configuration control signals, reset circuitry, an SPI™ ...
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... Connect the analog input signal source to the evaluation board per Table 2 on page 6. Verify from Table 4 on page 8 that the analog input channel selected is IN_A. 5. Configure the CDB5581 by connecting the control signal sources to the evaluation board as shown in Table 3 on page 7. Apply logic-level inputs as required to override the resistor pull-ups/pull-downs. ...
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... HARDWARE DESCRIPTION 3.1 Absolute Maximum Ratings Observe the following limits to ensure the CDB5581 component ratings are not exceeded. • CS5581 – The absolute maximum supply voltage that can be applied to the +3.3V power supply connection is +3.6V. – The absolute maximum power supply voltage that can be applied between pins VL and V1- is 6.1 V. • ...
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... Voltage Reference The voltage reference IC provided generates a 4.096 V precision reference. 3.3.5 ADC Reference Frequency The reference frequency for the CS5581 ADC is provided by a 16.000 MHz oscillator. DS796DB3 Table 3. Analog Input Channel Selection Multiplexer Input Channel Enabled 0 V 3.3 V CDB5581 ...
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... Digital Section 3.4.1 Hardware Configuration The CDB5581 evaluation board hardware comes pre-configured so the only connection required between it and a data acquisition system is the serial port connection. The hardware setup is reconfigurable through the hardware control interface connectors. Configure the evaluation board by setting the appropriate control line to the appropriate logic level. ...
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... Minimize ADC digital output edge transition current loading. A.2 Hardware Considerations At a system level, use shielded cable for interconnects. Keep interconnect cable lengths as short as pos- sible. Route analog and digital signals connecting to the PCB away from each other. DS796DB3 CDB5581 9 ...
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... APPENDIX B. BILL OF MATERIALS 10 CDB5581 DS796DB3 ...
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... APPENDIX C. SCHEMATICS DS796DB3 CDB5581 11 ...
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... CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 13 ...
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... CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 15 ...
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... APPENDIX D. LAYER PLOTS 16 CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 17 ...
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... CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 19 ...
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... CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 21 ...
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... CDB5581 DS796DB3 ...
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... DS796DB3 CDB5581 23 ...
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... CDB5581 DS796DB3 ...
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... APPENDIX E. CALIBRATION FUNCTION The calibration function has been removed from the CS5581. All references to calibration have been re- moved from this document. However, calibration still appears on the PCB. A jumper must be added to J2 for proper operation. DS796DB3 CDB5581 25 ...
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... SPI is a trademark of Motorola, Inc. PADS and PowerLogic are trademarks of Mentor Graphics. National Semiconductor is a registered trademark of National Semiconductor Corporation. 26 Changes Initial Release. Updated schematic to reflect new silicon revision. Removed calibration function / added Appendix E. CDB5581 DS796DB3 ...