CDB5581 Cirrus Logic Inc, CDB5581 Datasheet - Page 9

• Manufacturer Part Number: CDB5581
• Description: BOARD EVAL FOR CS5581 ADC
• Manufacturer: Cirrus Logic Inc
• Type: A/Dr

Specifications of CDB5581

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 200k
• Data Interface: Serial
• Inputs Per Adc: 2 Single
• Input Range: ±2.048 V
• Power (typ) @ Conditions: 85mW @ 200kSPS
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS5581
• Product: Data Conversion Development Tools
• Conversion Rate: 200 KSPS
• Resolution: 16 bit
• Maximum Clock Frequency: 16 MHz
• Interface Type: SPI
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): - 2.5 V
• For Use With/related Products: CS5581
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1559

APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5581
A.1
A.2
At a system level, use shielded cable for interconnects. Keep interconnect cable lengths as short as pos-
sible. Route analog and digital signals connecting to the PCB away from each other.
DS796DB3
PCB Layout Considerations
Hardware Considerations
• Keep the signal path short between the CS5581 ADC input capacitors C37, C44 and the ADC
• The analog input buffer amplifiers and ADC input buffer capacitors are placed before the multi-
• Power supply noise is a major design consideration and the power supplies need adequate
• When operating the ADC from +2.5 V and -2.5 V split supplies, place the power supply & buffer
• Keep all ground connections on each differential buffer amplifier as close to the device as pos-
• Keep trace lengths short between the ADC and the voltage reference IC negative supply pins.
• Route the oscillator output away from analog circuitry.
• Use a solid ground plane in the PCB layout.
• Provide adequate separation between analog and digital signals.
• To minimize distortion within the analog signal path, consider using components with smaller
• Minimize ADC digital output edge transition current loading.
input pin to minimize trace inductance.
plexer. Placing the buffer amplifiers before the multiplexer allows the amplifiers driving the ADC
buffer capacitors to be fully settled when sampled by the ADC. Therefore, the multiplexer must
be of a low on-resistance type to prevent distortion or latency issues.
bypassing and bulk capacitance.
amplifier bypass capacitor ground connections close together.
sible to avoid introducing differential noise through high-impedance connections.
voltage dependencies.
CDB5581
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