CDB5581 Cirrus Logic Inc, CDB5581 Datasheet - Page 3

BOARD EVAL FOR CS5581 ADC

CDB5581

Manufacturer Part Number
CDB5581
Description
BOARD EVAL FOR CS5581 ADC
Manufacturer
Cirrus Logic Inc
Type
A/Dr
Datasheet

Specifications of CDB5581

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
200k
Data Interface
Serial
Inputs Per Adc
2 Single
Input Range
±2.048 V
Power (typ) @ Conditions
85mW @ 200kSPS
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS5581
Product
Data Conversion Development Tools
Conversion Rate
200 KSPS
Resolution
16 bit
Maximum Clock Frequency
16 MHz
Interface Type
SPI
Supply Voltage (max)
3.3 V
Supply Voltage (min)
- 2.5 V
For Use With/related Products
CS5581
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1559
CDB5581
1. INTRODUCTION
The CDB5581 evaluation board is a platform for evaluating the CS5581 ADC performance. The evalua-
tion board is designed to connect to the SPI serial port of a processor or data capture system or will inter-
face directly to the CapturePlus II data acquisition system available from Cirrus Logic. The CapturePlus II
data acquisition system is a powerful integrated hardware/software tool designed to fully exercise the
CDB5581 and other Cirrus Logic evaluation boards.
The CDB5581 evaluation board is designed to simplify the hardware setup required to evaluate the
CS5581. Interfacing the CDB5581 evaluation board to a user-supplied data capture system can be as sim-
ple as connecting the SPI port and using the CDB5581 default hardware configuration. In this configura-
tion, simply press the Reset switch on the CDB5581 and it will automatically begin transmitting data to the
data capture system.
All evaluation board functionality for evaluating the CS5581 ADC is accessed through the connector in-
terface and board-level options.
The CS5581 delta-sigma ADC produces fully settled conversions to full specified accuracy at 200 kSps.
The ability to produce fully settled conversions for every sample makes it suitable for converting multi-
plexed input signals. To help evaluate this feature, the CDB5581 includes two single-ended analog inputs
multiplexed into the CS5581 The multiplexer can be switched at the CS5581 ADC sample speed and the
ADC will produce fully settled conversion data for each input channel.
For detailed information on the CS5581 ADC, please reference data sheet DS796 at www.cirrus.com.
DS796DB3
3

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