HI5714EVAL Intersil, HI5714EVAL Datasheet - Page 2

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HI5714EVAL

Manufacturer Part Number
HI5714EVAL
Description
EVALUATION PLATFORM HI5714
Manufacturer
Intersil
Datasheets

Specifications of HI5714EVAL

Number Of Adc's
1
Number Of Bits
8
Sampling Rate (per Second)
75M
Data Interface
Parallel
Inputs Per Adc
1 Single Ended
Input Range
2.7 Vpp
Power (typ) @ Conditions
325mW @ 75MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
HI5714
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power Supplies and Layout
The HI5714 Evaluation Board is a four layer board with a
layout optimized for the best performance for the ADC.
Figures 11 through 16 include a schematic of the board, a
board layout, and the various board layers. The user should
feel free to copy the layout in their application.
In order optimize the performance of the HI5714 at power
up, it is necessary that AV
separate supplies. The supplies to the board should be
driven by clean linear regulated supplies. AGND and DGND
are tied together under
ANALOG
CE
IN2 (AC)
1.2V REF
ANALOG
IN1 (DC)
DATA (D0-D7)
OUTPUTS
CLK
ANALOG
CLOCK
INPUT
INPUT
+5VA
DD
2
and DV
FIGURE 3. EVALUATION BOARD BLOCK DIAGRAM
DD
3.6V
1.3V
D
N-2
be driven from
t
SAMPLE N
CPH
t
DS
Application Note 9517
t
FIGURE 4. HI5714 TIMING
CPL
D
N-1
t
HD
V
V
V
CE
SAMPLE N+1
RT
RB
IN
t
D
HI5714
CLK
DOUT
O/UF
+5VD
the HI5714. Do not tie the supply grounds together back at
the supplies as this will create a ground loop and generate
additional noise.
Decoupling capacitors should be placed as close to the
HI5714 as possible. A 0.1µF and a 0.001µF leaded capacitor
will provide good decoupling but chip capacitors will provide
better decoupling at higher clock frequencies. Do not forget
a large value cap (1µF to 10µF) for low frequency
decoupling somewhere on your PC board.
D
N
+5VA-5.2VA
SAMPLE N+2
8
+12V -12V
D
N+1
1.4V
2.4V
1.4V
0.4V
DAC
CONNECTOR
26 PIN

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