HI5805EVAL1 Intersil, HI5805EVAL1 Datasheet

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HI5805EVAL1

Manufacturer Part Number
HI5805EVAL1
Description
EVALUATION PLATFORM HI5805
Manufacturer
Intersil
Datasheets

Specifications of HI5805EVAL1

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
5M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
4 Vpp
Power (typ) @ Conditions
300mW @ 5MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5805
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Description
The HI5805EVAL1 evaluation board is made available to
allow the circuit designer the ability to evaluate the
performance of the Intersil HI5805 monolithic 12-bit 5MSPS
analog-to-digital converter (ADC). As shown in the
Evaluation Board Functional Block Diagram, this evaluation
board includes sample clock generation circuitry, a single-
ended to differential analog input amplifier configuration and
digital data output latches/buffers. The buffered digital data
outputs are conveniently provided for easy interfacing to a
ribbon connector or logic probes. In addition, the evaluation
board is provided with some prototyping area for the addition
of user designed custom interfaces or circuits.
The sample clock generator circuit accepts the external
sampling signal through an SMA type RF connector, J2. This
input is AC-coupled and terminated in 50W allowing for
Evaluation Board Functional Block Diagram
ANALOG
INPUT
CLK
DGND
AGND
50
50
TM
+5V
3-1
D
-5V
-5V
D
1-888-INTERSIL or 321-724-7143
Application Note
D
TTL COMPARATOR
+5V
A
G = +1
G = -1
+5V
-5V
Using the HI5805EVAL1 Evaluation Board
D
A
|
Intersil and Design is a trademark of Intersil Corporation.
V
V
V
V
REFOUT
REFIN
IN+
IN-
connection to most laboratory signal generators. In addition,
the duty cycle of the clock driving the A/D converter is made
adjustable by way of a potentiometer so that the effects of
sample clock duty cycle on the HI5805 may be observed.
The analog input signal is also connected through an SMA
type RF connector, J1, and applied to a single-ended to
differential analog input amplifier. This input is AC-coupled
and terminated in 50W allowing for connection to most
laboratory signal generators. A differential RC lowpass filter
is incorporated on the output of the differential amplifier to
limit the broadband noise going into the HI5805 converter.
The digital data output latches/buffers consist of a pair of
74ALS574A D-type flip-flops. With this digital output
configuration the digital output data transitions seen at the
I/O connector are essentially time aligned with the rising
edge of the sampling clock.
HI5805
CLK
D
0
-D
11
March 1997
12
D
CLK
Q
12
|
Copyright
CLOCK
OUT
(CLK)
DIGITAL
DATA
OUT
(D0 - D11)
©
Intersil Corporation 2000
AN9707

Related parts for HI5805EVAL1

HI5805EVAL1 Summary of contents

Page 1

... TM Application Note Description The HI5805EVAL1 evaluation board is made available to allow the circuit designer the ability to evaluate the performance of the Intersil HI5805 monolithic 12-bit 5MSPS analog-to-digital converter (ADC). As shown in the Evaluation Board Functional Block Diagram, this evaluation board includes sample clock generation circuitry, a single- ended to differential analog input amplifi ...

Page 2

HI5805 A/D Theory of Operation The HI5805 is a 12-bit fully differential sampling pipelined A/D converter with digital error correction. Figure 1 depicts the circuit for the converters front-end differential-in- differential-out sample-and-hold (S/H). The sampling switches are controlled by internal ...

Page 3

HI5805 Functional Block Diagram BIAS IN- V IN+ S/H 4-BIT FLASH + - X8 4-BIT FLASH + - X8 4-BIT FLASH GND 3-3 Application Note 9707 STAGE 1 4-BIT DAC STAGE 3 4-BIT DAC ...

Page 4

Reference Generator, V ROUT The HI5805 has an internal reference voltage generator, therefore no external reference voltage is required. V must be connected to V when using the internal RIN reference. Internal to the converter, two reference voltages of 1.3V ...

Page 5

... TTL load and 10pF. The P1 I/O connector allows the evaluation board to be interfaced to the DSP evaluation boards available from Intersil. Alternatively, the digital output data and sample clock can also be accessed by clipping the test leads of a logic analyzer or data acquisition system onto the I/O pins of connector header P2 ...

Page 6

... DAC is only suggested when doing bandwidth or video testing. HP8662A HP8662A REF BANDPASS FILTER CLK V IN COMPARATOR V IN CLK HI5805 DIGITAL DATA OUTPUT HI5805EVAL1 10 EVALUATION BOARD DAS9200 GPIB PC FIGURE 6. HIGH-SPEED A/D PERFORMANCE TEST SYSTEM 3-6 Application Note 9707 PIN NO ...

Page 7

... HI5805EVAL1 Typical Performance Curves INPUT FREQUENCY (MHz) FIGURE 7. EFFECTIVE NUMBER OF BITS (ENOB) vs INPUT FREQUENCY INPUT FREQUENCY (MHz) FIGURE 9. SINAD vs INPUT FREQUENCY INPUT FREQUENCY (MHz) FIGURE 11. SNR vs INPUT FREQUENCY 3-7 Application Note 9707 -20 -30 -40 -50 -60 -70 -80 -90 1 100 FIGURE 8. TOTAL HARMONIC DISTORTION (THD) vs INPUT ...

Page 8

... Application Note 9707 FIGURE 13. HI5805EVAL1 EVALUATION BOARD PARTS LAYOUT (NEAR SIDE) FIGURE 14. HI5805EVAL1 EVALUATION BOARD COMPONENT NEAR SIDE (LAYER 1) 3-8 ...

Page 9

... Application Note 9707 FIGURE 15. HI5805EVAL1 EVALUATION BOARD GROUND PLANE LAYER (LAYER 2) FIGURE 16. HI5805EVAL1 EVALUATION BOARD POWER PLANE LAYER (LAYER 3) 3-9 ...

Page 10

... Application Note 9707 FIGURE 17. HI5805EVAL1 EVALUATION BOARD COMPONENT FAR SIDE (LAYER 4) FIGURE 18. HI5805EVAL1 EVALUATION BOARD PARTS LAYOUT (FAR SIDE) 3-10 ...

Page 11

FB8 + C28 C29 C30 10 F 0.1 F 0 C33 C34 10 F 0.1 F CLK + C21 C22 0.1 F C23 0 IN+ ...

Page 12

... HI5805EVAL1 Evaluation Board Schematic Diagrams 56.2 R14 A/R R3 499 249 J2 CLK IN R10 249 +5V D R11 249 3-12 Application Note 9707 + 0. OPA642U 22.1 R5 +5V A 499 + C10 0. OPA642U 4 -5V A C11 C12 0. + C14 0 49.9 - GND -5V D C17 C18 0. 3(CW) 1 (CCW) ...

Page 13

... HI5805EVAL1 Evaluation Board Schematic Diagrams D0 - D11, CLK 3-13 Application Note 9707 (Continued) P1C D10 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 CLK C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 P1A D11 A10 ...

Page 14

E1 E14 FB1 +5V A +5VAIN (OP-AMPS) + C46 C35 AGND 0 AGND AND DGND TIE TOGETHER AT A SINGLE POINT WHERE THE POWER SUPPLIES ENTER THE PWB E2 E4 FB2 +5V A1 +5VA1IN (A ...

Page 15

... HI5805EVAL1 Evaluation Board Parts List REFERENCE DESIGNATOR QTY - 1 Printed Wiring Board R1 1 56.2 , 1/8W 1206 Chip 22.1 , 1/8W 1206 Chip 499 , 1/8W 1206 Chip, 1% R4, 10, 11, 12 249 , 1/8W 1206 Chip 0.0 , 1/4W 1206 Chip 100 , 1/8W 1206 Chip, 1% ...

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