HI5805EVAL1 Intersil, HI5805EVAL1 Datasheet - Page 6

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HI5805EVAL1

Manufacturer Part Number
HI5805EVAL1
Description
EVALUATION PLATFORM HI5805
Manufacturer
Intersil
Datasheets

Specifications of HI5805EVAL1

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
5M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
4 Vpp
Power (typ) @ Conditions
300mW @ 5MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5805
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
HI5805 Performance Characterization
Dynamic testing is used to evaluate the performance of the
HI5805 A/D converter. Among the tests performed are Signal-
to-Noise and Distortion Ratio (SINAD), Signal-to-Noise Ratio
(SNR), Total Harmonic Distortion (THD), Spurious Free
Dynamic Range (SFDR) and Intermodulation Distortion (IMD).
Figure 6 shows the test system used to perform dynamic
testing on high-speed ADCs at Intersil. The clock (CLK) and
analog input (V
HP8662A synthesized signal generators that are phase locked
to each other to ensure coherence. The output of the signal
generator driving the ADC analog input is bandpass filtered to
improve the harmonic distortion of the analog input signal. The
comparator on the evaluation board will convert the sine wave
CLK input signal to a square wave at TTL logic levels to drive
the sample clock input of the HI5805. The ADC data is
captured by a logic analyzer and then transferred over the GPIB
bus to the PC. The PC has the required software to perform the
Fast Fourier Transform (FFT) and do the data analysis.
Coherent testing is recommended in order to avoid the
inaccuracies of windowing. The sampling frequency and
analog input frequency have the following relationship: F
= M/N, where F
sinusoid, F
samples, and M is the number of cycles over which the
samples are taken. By making M an integer and odd number
(1, 3, 5, ...) the samples are assured of being nonrepetitive.
Refer to the HI5805 data sheet for a complete list of test
definitions and the results that can be expected using the
evaluation board with the test setup shown. Evaluating the
part with a reconstruction DAC is only suggested when
doing bandwidth or video testing.
FIGURE 6. HIGH-SPEED A/D PERFORMANCE TEST SYSTEM
COMPARATOR
HP8662A
S
CLK
EVALUATION BOARD
is the sampling frequency, N is the number of
IN
HI5805EVAL1
I
) signals are sourced from low phase noise
is the frequency of the input analog
REF
CLK
DIGITAL DATA OUTPUT
3-6
BANDPASS
HP8662A
DAS9200
FILTER
HI5805
V
PC
IN
10
V
IN
GPIB
OSCILLOSCOPE
12-BIT DAC
Application Note 9707
I
/F
S
PIN NO.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
TABLE 3. HI5805 PIN DESCRIPTION
DV
D
DV
D
V
D
DV
NAME
AV
A
A
AV
V
V
V
CLK
V
ROUT
D11
D10
GND1
GND1
GND2
GND
GND
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
RIN
IN+
DC
IN-
CC1
CC1
CC2
CC
CC
Input Clock
Digital Supply (5.0V)
Digital Ground
Digital Supply (5.0V)
Digital Ground
Analog Supply (5.0V)
Analog Ground
Positive Analog Input
Negative Analog Input
DC Bias Voltage Output
Reference Voltage Output
Reference Voltage Input
Analog Ground
Analog Supply (5.0V)
Data Bit 11 Output (MSB)
Data Bit 10 Output
Data Bit 9 Output
Data Bit 8 Output
Data Bit 7 Output
Data Bit 6 Output
Digital Output Ground
Digital Output Supply (3.0V to 5.0V)
Data Bit 5 Output
Data Bit 4 Output
Data Bit 3 Output
Data Bit 2 Output
Data Bit 1 Output
Data Bit 0 Output (LSB)
DESCRIPTION

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