DK86060-3 Fujitsu Semiconductor America Inc, DK86060-3 Datasheet - Page 4

• Manufacturer Part Number: DK86060-3
• Description: KIT DEV 16BIT DAC FOR MB86060
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86060-3

• Number Of Dac's: 1
• Number Of Bits: 16
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 400M
• Data Interface: Parallel
• Dac Type: Current
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86060
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1009

1
The MB86060 integrates a 12-bit 400MSa/s DAC core with selectable front end processing to provide
input interpolation filtering, dither and noise shaping. Versatile interfacing via the 16-bit parallel
CMOS data input allows different system requirements to be accommodated, with either offset binary
or 2’s complement data formats selected by an input format control pin.
The device is manufactured in a 0.35µm advanced CMOS process with Triple Well extension giving
improved isolation between analog blocks and digital-analog.
A functional block diagram is shown in Figure 1.
1.1
The device can be configured into a number of different operating modes, depending on which clock
source and interpolation filtering mode is selected. The following sections summarise the MB86060
operating modes according to clock multiplier and interpolation filtering configuration.
The MB86060 has two Interpolation filters, that may be operated in any of the following four modes.
• x1 - Interpolating filters disabled, effectively a conventional 12-bit DAC for up to 200MSa/s
• x2 slow - First interpolating filter only, used for generating 0~43MHz, assuming 100MSa/s data
• x2 fast - Second interpolating filter only, used for generating 0~74MHz, assuming 200MSa/s data
• x4 - Full interpolation, for generating 0~43MHz with 100MSa/s data & maximum DAC rate
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
Delay line ctrl
Data CLK out
Functional Description
Operating Modes
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
Data Format
Filter control
CLK in (diff.)
Mult mode
Clk Select
FML Mixed Signal
(diff.)
Data In
Crystal
Reset
Lock
2
16
2
Figure 1 MB86060 Functional Block Diagram
MB86060 16-bit Interpolating Digital to Analog Converter
Production
3
2
Clock Divider
Multiplier
x2
Clock
[x2 slow]
x2
Reference
Copyright © 2003-2009 Fujitsu Microelectronics Europe GmbH
Bandgap
[x2 fast]
Generator
HP Filter
Dither
12
16
February 2009 Version 2.0
DAC
Shaper
Noise
Programmable
excluded from
Dithermay be
final MP
devices
3
2
FME/MS/SFDAC1/DS/4250
Dither
NS Enable
Over
Output
Control
Shuffle
DAC