C8051F064EK Silicon Laboratories Inc, C8051F064EK Datasheet - Page 217

KIT EVAL FOR C8051F064

C8051F064EK

Manufacturer Part Number
C8051F064EK
Description
KIT EVAL FOR C8051F064
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F064EK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F064
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F064
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1219
Bits7-0:
Bits7-0:
Note:
R/W
R/W
Bit7
Bit7
P2MDIN.[7:0]: Port 2 Input Mode Bits.
0: Port Pin is configured in Analog Input mode. The digital input path is disabled (a read from
the Port bit will always return ‘0’). The weak pull-up on the pin is disabled.
1: Port Pin is configured in Digital Input mode. A read from the Port bit will return the logic
level at the Pin. The state of the weak pull-up is determined by the WEAKPUD bit (XBR2.7,
see Figure 18.7).
P2MDOUT.[7:0]: Port2 Output Mode Bits.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
SDA, SCL, and RX0 (when UART0 is in Mode 0) and RX1 (when UART1 is in Mode 0) are
always configured as Open-Drain when they appear on Port pins.
R/W
R/W
Bit6
Bit6
Figure 18.16. P2MDOUT: Port2 Output Mode Register
Figure 18.15. P2MDIN: Port2 Input Mode Register
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.2
R/W
R/W
Bit3
Bit3
C8051F060/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0xAE
F
0xA6
F
Reset Value
Reset Value
00000000
11111111
217

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