C8051F064EK Silicon Laboratories Inc, C8051F064EK Datasheet - Page 223

KIT EVAL FOR C8051F064

C8051F064EK

Manufacturer Part Number
C8051F064EK
Description
KIT EVAL FOR C8051F064
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F064EK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F064
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F064
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1219
Bits7-0:
Note:
Bits7-0:
P6.7
R/W
R/W
Bit7
Bit7
P6.[7:0]: Port6 Output Latch Bits.
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (open, if corresponding P6MDOUT bit = 0). See Figure 18.24.
Read - Returns states of I/O pins.
0: P6.n pin is logic low.
1: P6.n pin is logic high.
P6.[7:0] can be driven by the External Data Memory Interface (as Address[15:8] in Multi-
plexed mode, or as Address[7:0] in Non-multiplexed mode). See
Memory Interface and On-Chip XRAM” on page 187
Memory Interface.
P6MDOUT.[7:0]: Port6 Output Mode Bits.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P6.6
R/W
R/W
Bit6
Bit6
Figure 18.24. P6MDOUT: Port6 Output Mode Register
P6.5
R/W
R/W
Bit5
Bit5
Figure 18.23. P6: Port6 Data Register
P6.4
R/W
R/W
Bit4
Bit4
Rev. 1.2
P6.3
R/W
R/W
Bit3
Bit3
C8051F060/1/2/3/4/5/6/7
P6.2
R/W
R/W
Bit2
Bit2
for more information about the External
P6.1
R/W
R/W
Bit1
Bit1
Section “17. External Data
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P6.0
R/W
R/W
Bit0
Bit0
0xE8
F
0x9E
F
Addressable
Reset Value
Reset Value
00000000
11111111
Bit
223

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