MPC8313E-RDBB Freescale Semiconductor, MPC8313E-RDBB Datasheet - Page 23
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MPC8313E-RDBB
Manufacturer Part Number
MPC8313E-RDBB
Description
BOARD CPU 8313E VER 2.1
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDBB
Contents
Board
Processor To Be Evaluated
MPC8xxx
Data Bus Width
32 bit
Interface Type
Ethernet, USB, JTAG, SPI, UART
Dimensions
170 mm x 170 mm
Operating Supply Voltage
3.3 V
For Use With/related Products
MPC8313E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.2.1.1
Table 26
Figure 8
8.2.1.2
Table 27
Freescale Semiconductor
At recommended operating conditions with LV
At recommended operating conditions with LV
TX_CLK clock period 10 Mbps
TX_CLK clock period 100 Mbps
TX_CLK duty cycle
TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay
TX_CLK data clock rise V
TX_CLK data clock fall V
Note:
1. The symbols used for timing specifications follow the pattern of t
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
inputs and t
timing (MT) for the time t
the clock reference symbol representation is based on two to three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
shows the MII transmit AC timing diagram.
provides the MII transmit AC timing specifications.
provides the MII receive AC timing specifications.
(first two letters of functional block)(reference)(state)(signal)(state)
MII Transmit AC Timing Specifications
MII Receive AC Timing Specifications
TXD[3:0]
TX_CLK
Parameter/Condition
Parameter/Condition
TX_EN
TX_ER
MPC8313E PowerQUICC
IH
IL
(max) to V
MTX
(min) to V
clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general,
MTX
Table 26. MII Transmit AC Timing Specifications
Table 27. MII Receive AC Timing Specifications
IH
IL
represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is
Figure 8. MII Transmit AC Timing Diagram
t
(min)
(max)
MTXH
DDA
DDA
/
/
LV
LV
t
MTX
DDB
DDB
™
/NV
/NV
II Pro Processor Hardware Specifications, Rev. 3
DD
DD
of 3.3 V ± 0.3 V.
of 3.3 V ± 0.3 V.
t
t
MTKHDX
t
MRXH
t
Symbol
MTXF
t
MTXH/
Symbol
MRDVKH
t
MTKHDX
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
t
t
for outputs. For example, t
MRX
MRX
t
t
MTXR
MTXF
MTX
MTX
/t
MRX
t
MTX
1
1
t
MTXR
Ethernet: Three-Speed Ethernet, MII Management
10.0
Min
Min
1.0
1.0
35
35
—
—
—
—
1
MTKHDX
Typ
400
Typ
400
40
40
—
—
—
—
—
5
symbolizes MII transmit
Max
Max
4.0
4.0
65
15
65
—
—
—
—
—
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
%
%
for
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